On Sun, Mar 4, 2012 at 09:46, Michael S. Tsirkin <m...@redhat.com> wrote: > commit 5caef97a16010f818ea8b950e2ee24ba876643ad introduced > a regression: we do not make IO base/limit upper 16 > bit registers writeable, so we should report a 16 bit > IO range type, not a 32 bit one. > Note that PCI_PREF_RANGE_TYPE_32 is 0x0, but PCI_IO_RANGE_TYPE_32 is 0x1. > > In particular, this broke sparc64. > > Note: this just reverts to behaviour prior to the patch. > Making PCI_IO_BASE_UPPER16 and PCI_IO_LIMIT_UPPER16 > registers writeable should, and seems to, work just as well, but > as no system seems to actually be interested in 32 bit IO, > let's not make unnecessary changes. > > Reported-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> > Signed-off-by: Michael S. Tsirkin <m...@redhat.com> > > Mark, can you confirm that this fixes the bug for you?
No, running qemu-system-sparc64 -serial stdio still shows black screen and the following on console: OpenBIOS for Sparc64 Unhandled Exception 0x0000000000000032 PC = 0x00000000ffd19e18 NPC = 0x00000000ffd19e1c Stopping execution This unassigned memory exception is triggered because CMD646 IDE I/O registers are not accessible: (qemu) info pci Bus 0, device 0, function 0: Host bridge: PCI device 108e:a000 id "" Bus 0, device 1, function 0: PCI bridge: PCI device 108e:5000 BUS 0. secondary bus 1. subordinate bus 1. IO range [0x0000, 0x0fff] memory range [0x00000000, 0x000fffff] prefetchable memory range [0x00000000, 0x000fffff] id "" Bus 0, device 1, function 1: PCI bridge: PCI device 108e:5000 BUS 0. secondary bus 2. subordinate bus 2. IO range [0x0000, 0x0fff] memory range [0x00000000, 0x000fffff] prefetchable memory range [0x00000000, 0x000fffff] id "" Bus 0, device 2, function 0: VGA controller: PCI device 1234:1111 BAR0: 32 bit prefetchable memory at 0x00800000 [0x00ffffff]. BAR6: 32 bit memory at 0x01000000 [0x0100ffff]. id "" Bus 0, device 3, function 0: Bridge: PCI device 108e:1000 BAR0: 32 bit memory at 0x02000000 [0x02ffffff]. BAR1: 32 bit memory at 0x03000000 [0x037fffff]. id "" Bus 0, device 4, function 0: Ethernet controller: PCI device 10ec:8029 IRQ 0. BAR0: I/O at 0xffffffffffffffff [0x00fe]. BAR6: 32 bit memory at 0x03800000 [0x0380ffff]. id "" Bus 0, device 5, function 0: IDE controller: PCI device 1095:0646 IRQ 1. BAR0: I/O at 0xffffffffffffffff [0x0006]. BAR1: I/O at 0xffffffffffffffff [0x0002]. BAR2: I/O at 0xffffffffffffffff [0x0006]. BAR3: I/O at 0xffffffffffffffff [0x0002]. BAR4: I/O at 0xffffffffffffffff [0x000e]. id "" (qemu) info mtree memory 0000000000000000-7ffffffffffffffe (prio 0, RW): system 0000000000000000-0000000007ffffff (prio 0, RW): sun4u.ram 000001fe00000000-000001fe0000ffff (prio 0, RW): apb-config 000001fe01000000-000001fe01ffffff (prio 0, RW): apb-pci-config 000001fe02000000-000001fe0200ffff (prio 0, RW): apb-pci-ioport 000001ff00000000-000001ffffffffff (prio 0, RW): pci-mmio 000001ff00000000-000001ff000fffff (prio 1, RW): alias pci_bridge_mem @pci_bridge_pci 0000000000000000-00000000000fffff 000001ff00000000-000001ff000fffff (prio 1, RW): alias pci_bridge_pref_mem @pci_bridge_pci 0000000000000000-00000000000fffff 000001ff00000000-000001ff000fffff (prio 1, RW): alias pci_bridge_mem @pci_bridge_pci 0000000000000000-00000000000fffff 000001ff00000000-000001ff000fffff (prio 1, RW): alias pci_bridge_pref_mem @pci_bridge_pci 0000000000000000-00000000000fffff 000001ff000a0000-000001ff000affff (prio 2, RW): alias vga.chain4 @vga.vram 0000000000000000-000000000000ffff 000001ff000a0000-000001ff000bffff (prio 1, RW): vga-lowmem 000001ff00800000-000001ff00ffffff (prio 1, RW): vga.vram 000001ff01000000-000001ff0100ffff (prio 1, RW): vga.rom 000001ff02000000-000001ff02ffffff (prio 1, RW): isa-mmio 000001ff03000000-000001ff037fffff (prio 1, RW): isa-mmio 000001ff03800000-000001ff0380ffff (prio 1, RW): ne2000.rom 000001fff0000000-000001fff03fffff (prio 0, R-): sun4u.prom pci_bridge_pci 0000000000000000-7ffffffffffffffe (prio 0, RW): pci_bridge_pci pci_bridge_pci 0000000000000000-7ffffffffffffffe (prio 0, RW): pci_bridge_pci vga.vram 0000000000800000-0000000000ffffff (prio 1, RW): vga.vram I/O 0000000000000000-000000000000ffff (prio 0, RW): io 0000000000000000-0000000000000fff (prio 1, RW): alias pci_bridge_io @pci_bridge_io 0000000000000000-0000000000000fff 0000000000000000-0000000000000fff (prio 1, RW): alias pci_bridge_io @pci_bridge_io 0000000000000000-0000000000000fff 0000000000000060-0000000000000060 (prio 0, RW): i8042-data 0000000000000064-0000000000000064 (prio 0, RW): i8042-cmd 0000000000000074-0000000000000077 (prio 0, RW): m48t59 00000000000001ce-00000000000001ce (prio 0, RW): alias vbe @vbe 00000000000001ce-00000000000001ce 00000000000001d0-00000000000001d0 (prio 0, RW): alias vbe @vbe 00000000000001d0-00000000000001d0 0000000000000378-000000000000037f (prio 0, RW): alias parallel @parallel 0000000000000378-000000000000037f 00000000000003b4-00000000000003b5 (prio 0, RW): alias vga @vga 00000000000003b4-00000000000003b5 00000000000003ba-00000000000003ba (prio 0, RW): alias vga @vga 00000000000003ba-00000000000003ba 00000000000003c0-00000000000003cf (prio 0, RW): alias vga @vga 00000000000003c0-00000000000003cf 00000000000003d4-00000000000003d5 (prio 0, RW): alias vga @vga 00000000000003d4-00000000000003d5 00000000000003da-00000000000003da (prio 0, RW): alias vga @vga 00000000000003da-00000000000003da 00000000000003f1-00000000000003f5 (prio 0, RW): alias fdc @fdc 00000000000003f1-00000000000003f5 00000000000003f7-00000000000003f7 (prio 0, RW): alias fdc @fdc 00000000000003f7-00000000000003f7 00000000000003f8-00000000000003ff (prio 0, RW): serial 0000000000000510-0000000000000511 (prio 0, RW): fwcfg > --- > hw/pci.c | 4 ++-- > 1 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/hw/pci.c b/hw/pci.c > index fee27fc..6d08cef 100644 > --- a/hw/pci.c > +++ b/hw/pci.c > @@ -633,8 +633,8 @@ static void pci_init_mask_bridge(PCIDevice *d) > memset(d->wmask + PCI_PREF_BASE_UPPER32, 0xff, 8); > > /* Supported memory and i/o types */ > - d->config[PCI_IO_BASE] |= PCI_IO_RANGE_TYPE_32; > - d->config[PCI_IO_LIMIT] |= PCI_IO_RANGE_TYPE_32; > + d->config[PCI_IO_BASE] |= PCI_IO_RANGE_TYPE_16; > + d->config[PCI_IO_LIMIT] |= PCI_IO_RANGE_TYPE_16; > pci_word_test_and_set_mask(d->config + PCI_PREF_MEMORY_BASE, > PCI_PREF_RANGE_TYPE_64); > pci_word_test_and_set_mask(d->config + PCI_PREF_MEMORY_LIMIT, > -- > 1.7.9.111.gf3fb0