On Wed, Oct 25, 2023 at 10:49:58AM -0300, Daniel Henrique Barboza wrote:
> The profile support is handling multi-letter extensions only. Let's add
> support for MISA bits as well.
>
> We'll go through every known MISA bit. If the profile doesn't declare the bit
> as mandatory, ignore it. Otherwise, set or clear the bit in env->misa_ext and
> env->misa_ext_mask depending on whether the profile was set to 'true' or
> 'false'.
>
> Signed-off-by: Daniel Henrique Barboza <dbarb...@ventanamicro.com>
> Reviewed-by: LIU Zhiwei <zhiwei_...@linux.alibaba.com>
> ---
> target/riscv/tcg/tcg-cpu.c | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c
> index b2489a5317..57026cfcca 100644
> --- a/target/riscv/tcg/tcg-cpu.c
> +++ b/target/riscv/tcg/tcg-cpu.c
> @@ -804,6 +804,19 @@ static void cpu_set_profile(Object *obj, Visitor *v,
> const char *name,
> profile->user_set = true;
> profile->enabled = value;
>
> + for (i = 0; misa_bits[i] != 0; i++) {
> + uint32_t bit = misa_bits[i];
> +
> + if (!(profile->misa_ext & bit)) {
> + continue;
> + }
> +
> + g_hash_table_insert(misa_ext_user_opts,
> + GUINT_TO_POINTER(bit),
> + (gpointer)value);
> + riscv_cpu_write_misa_bit(cpu, bit, profile->enabled);
> + }
> +
> for (i = 0; profile->ext_offsets[i] != RISCV_PROFILE_EXT_LIST_END; i++) {
> ext_offset = profile->ext_offsets[i];
>
> --
> 2.41.0
>
>
Reviewed-by: Andrew Jones <ajo...@ventanamicro.com>
