On Fri, Oct 27, 2023 at 1:21 AM Max Chou <max.c...@sifive.com> wrote:
>
> After vector crypto spec v1.0.0-rc3 release, the Zvkb extension is
> defined as a proper subset of the Zvbb extension. And both the Zvkn and
> Zvks shorthand extensions replace the included Zvbb extension by Zvkb
> extnesion.
>
> Signed-off-by: Max Chou <max.c...@sifive.com>
Acked-by: Alistair Francis <alistair.fran...@wdc.com>
Alistair
> ---
> target/riscv/cpu_cfg.h | 1 +
> target/riscv/tcg/tcg-cpu.c | 6 +++---
> 2 files changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/target/riscv/cpu_cfg.h b/target/riscv/cpu_cfg.h
> index d8d17dedeed..935335e5721 100644
> --- a/target/riscv/cpu_cfg.h
> +++ b/target/riscv/cpu_cfg.h
> @@ -88,6 +88,7 @@ struct RISCVCPUConfig {
> bool ext_zve64d;
> bool ext_zvbb;
> bool ext_zvbc;
> + bool ext_zvkb;
> bool ext_zvkg;
> bool ext_zvkned;
> bool ext_zvknha;
> diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c
> index b9eaecb699c..1b08f27eee4 100644
> --- a/target/riscv/tcg/tcg-cpu.c
> +++ b/target/riscv/tcg/tcg-cpu.c
> @@ -508,9 +508,9 @@ void riscv_cpu_validate_set_extensions(RISCVCPU *cpu,
> Error **errp)
> * In principle Zve*x would also suffice here, were they supported
> * in qemu
> */
> - if ((cpu->cfg.ext_zvbb || cpu->cfg.ext_zvkg || cpu->cfg.ext_zvkned ||
> - cpu->cfg.ext_zvknha || cpu->cfg.ext_zvksed || cpu->cfg.ext_zvksh) &&
> - !cpu->cfg.ext_zve32f) {
> + if ((cpu->cfg.ext_zvbb || cpu->cfg.ext_zvkb || cpu->cfg.ext_zvkg ||
> + cpu->cfg.ext_zvkned || cpu->cfg.ext_zvknha || cpu->cfg.ext_zvksed ||
> + cpu->cfg.ext_zvksh) && !cpu->cfg.ext_zve32f) {
> error_setg(errp,
> "Vector crypto extensions require V or Zve* extensions");
> return;
> --
> 2.34.1
>
>
