On Thu, Nov 2, 2023 at 11:50 AM Stefan Berger <stef...@linux.ibm.com> wrote:
>
>
>
> On 10/31/23 00:00, Joelle van Dyne wrote:
> > This logic is similar to TPM TIS ISA device. Since TPM CRB can only
> > support TPM 2.0 backends, we check for this in realize.
>
> The problem on x86_64 is that the creation of the ACPI doesn't seem to
> get invoked. The device then ends up not working under Linux. The
> problem seems to be
>
> .parent = TYPE_DEVICE
>
> When I change this to TYPE_ISA_DEVICE it starts generating the ACPI
> table. I am not sure what other side effects this may have, though.
Ah sorry, this is probably a side effect of the patch I dropped where
the bus was moved back from ISA to SysBus. The patch was dropped
because people complained that the side effects of a new device
appearing on the ISA bus during migration is unknown. That means we
will probably have to add some logic to call the ACPI build methods on
non-ISA devices.
>
> Stefan
> >
> > Signed-off-by: Joelle van Dyne <j...@getutm.app>
> > Reviewed-by: Stefan Berger <stef...@linux.ibm.com>
> > ---
> > hw/tpm/tpm_crb.h | 2 ++
> > hw/i386/acpi-build.c | 23 -----------------------
> > hw/tpm/tpm_crb.c | 16 ++++++++++++++++
> > hw/tpm/tpm_crb_common.c | 19 +++++++++++++++++++
> > 4 files changed, 37 insertions(+), 23 deletions(-)
> >
> > diff --git a/hw/tpm/tpm_crb.h b/hw/tpm/tpm_crb.h
> > index 36863e1664..e6a86e3fd1 100644
> > --- a/hw/tpm/tpm_crb.h
> > +++ b/hw/tpm/tpm_crb.h
> > @@ -73,5 +73,7 @@ void tpm_crb_init_memory(Object *obj, TPMCRBState *s,
> > Error **errp);
> > void tpm_crb_mem_save(TPMCRBState *s, uint32_t *saved_regs, void
> > *saved_cmdmem);
> > void tpm_crb_mem_load(TPMCRBState *s, const uint32_t *saved_regs,
> > const void *saved_cmdmem);
> > +void tpm_crb_build_aml(TPMIf *ti, Aml *scope, uint32_t baseaddr, uint32_t
> > size,
> > + bool build_ppi);
> >
> > #endif /* TPM_TPM_CRB_H */
> > diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> > index 80db183b78..ce3f7b2d91 100644
> > --- a/hw/i386/acpi-build.c
> > +++ b/hw/i386/acpi-build.c
> > @@ -1441,9 +1441,6 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
> > uint32_t nr_mem = machine->ram_slots;
> > int root_bus_limit = 0xFF;
> > PCIBus *bus = NULL;
> > -#ifdef CONFIG_TPM
> > - TPMIf *tpm = tpm_find();
> > -#endif
> > bool cxl_present = false;
> > int i;
> > VMBusBridge *vmbus_bridge = vmbus_bridge_find();
> > @@ -1790,26 +1787,6 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
> > }
> > }
> >
> > -#ifdef CONFIG_TPM
> > - if (TPM_IS_CRB(tpm)) {
> > - dev = aml_device("TPM");
> > - aml_append(dev, aml_name_decl("_HID", aml_string("MSFT0101")));
> > - aml_append(dev, aml_name_decl("_STR",
> > - aml_string("TPM 2.0 Device")));
> > - crs = aml_resource_template();
> > - aml_append(crs, aml_memory32_fixed(TPM_CRB_ADDR_BASE,
> > - TPM_CRB_ADDR_SIZE,
> > AML_READ_WRITE));
> > - aml_append(dev, aml_name_decl("_CRS", crs));
> > -
> > - aml_append(dev, aml_name_decl("_STA", aml_int(0xf)));
> > - aml_append(dev, aml_name_decl("_UID", aml_int(1)));
> > -
> > - tpm_build_ppi_acpi(tpm, dev);
> > -
> > - aml_append(sb_scope, dev);
> > - }
> > -#endif
> > -
> > if (pcms->sgx_epc.size != 0) {
> > uint64_t epc_base = pcms->sgx_epc.base;
> > uint64_t epc_size = pcms->sgx_epc.size;
> > diff --git a/hw/tpm/tpm_crb.c b/hw/tpm/tpm_crb.c
> > index 99c64dd72a..8d57295b15 100644
> > --- a/hw/tpm/tpm_crb.c
> > +++ b/hw/tpm/tpm_crb.c
> > @@ -19,6 +19,8 @@
> > #include "qemu/module.h"
> > #include "qapi/error.h"
> > #include "exec/address-spaces.h"
> > +#include "hw/acpi/acpi_aml_interface.h"
> > +#include "hw/acpi/tpm.h"
> > #include "hw/qdev-properties.h"
> > #include "hw/pci/pci_ids.h"
> > #include "hw/acpi/tpm.h"
> > @@ -121,6 +123,11 @@ static void tpm_crb_none_realize(DeviceState *dev,
> > Error **errp)
> > return;
> > }
> >
> > + if (tpm_crb_none_get_version(TPM_IF(s)) != TPM_VERSION_2_0) {
> > + error_setg(errp, "TPM CRB only supports TPM 2.0 backends");
> > + return;
> > + }
> > +
> > tpm_crb_init_memory(OBJECT(s), &s->state, errp);
> >
> > /* only used for migration */
> > @@ -142,10 +149,17 @@ static void tpm_crb_none_realize(DeviceState *dev,
> > Error **errp)
> > }
> > }
> >
> > +static void build_tpm_crb_none_aml(AcpiDevAmlIf *adev, Aml *scope)
> > +{
> > + tpm_crb_build_aml(TPM_IF(adev), scope, TPM_CRB_ADDR_BASE,
> > TPM_CRB_ADDR_SIZE,
> > + true);
> > +}
> > +
> > static void tpm_crb_none_class_init(ObjectClass *klass, void *data)
> > {
> > DeviceClass *dc = DEVICE_CLASS(klass);
> > TPMIfClass *tc = TPM_IF_CLASS(klass);
> > + AcpiDevAmlIfClass *adevc = ACPI_DEV_AML_IF_CLASS(klass);
> >
> > dc->realize = tpm_crb_none_realize;
> > device_class_set_props(dc, tpm_crb_none_properties);
> > @@ -154,6 +168,7 @@ static void tpm_crb_none_class_init(ObjectClass *klass,
> > void *data)
> > tc->model = TPM_MODEL_TPM_CRB;
> > tc->get_version = tpm_crb_none_get_version;
> > tc->request_completed = tpm_crb_none_request_completed;
> > + adevc->build_dev_aml = build_tpm_crb_none_aml;
> >
> > set_bit(DEVICE_CATEGORY_MISC, dc->categories);
> > }
> > @@ -166,6 +181,7 @@ static const TypeInfo tpm_crb_none_info = {
> > .class_init = tpm_crb_none_class_init,
> > .interfaces = (InterfaceInfo[]) {
> > { TYPE_TPM_IF },
> > + { TYPE_ACPI_DEV_AML_IF },
> > { }
> > }
> > };
> > diff --git a/hw/tpm/tpm_crb_common.c b/hw/tpm/tpm_crb_common.c
> > index 605e8576e9..4fff0c6b59 100644
> > --- a/hw/tpm/tpm_crb_common.c
> > +++ b/hw/tpm/tpm_crb_common.c
> > @@ -239,3 +239,22 @@ void tpm_crb_mem_load(TPMCRBState *s, const uint32_t
> > *saved_regs,
> > memcpy(regs, saved_regs, TPM_CRB_R_MAX);
> > memcpy(®s[R_CRB_DATA_BUFFER], saved_cmdmem, A_CRB_DATA_BUFFER);
> > }
> > +
> > +void tpm_crb_build_aml(TPMIf *ti, Aml *scope, uint32_t baseaddr, uint32_t
> > size,
> > + bool build_ppi)
> > +{
> > + Aml *dev, *crs;
> > +
> > + dev = aml_device("TPM");
> > + aml_append(dev, aml_name_decl("_HID", aml_string("MSFT0101")));
> > + aml_append(dev, aml_name_decl("_STR", aml_string("TPM 2.0 Device")));
> > + aml_append(dev, aml_name_decl("_UID", aml_int(1)));
> > + aml_append(dev, aml_name_decl("_STA", aml_int(0xF)));
> > + crs = aml_resource_template();
> > + aml_append(crs, aml_memory32_fixed(baseaddr, size, AML_READ_WRITE));
> > + aml_append(dev, aml_name_decl("_CRS", crs));
> > + if (build_ppi) {
> > + tpm_build_ppi_acpi(ti, dev);
> > + }
> > + aml_append(scope, dev);
> > +}
