On Tue, 7 Nov 2023 at 03:08, Richard Henderson
<richard.hender...@linaro.org> wrote:
>
> Rename the existing insert tlb helpers to emphasize that they
> are for pa1.1 cpus. Implement a combined i/d tlb for pa2.0.
> Still missing is the new 'P' tlb bit.
>
> Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
>
> +static void itlbt_pa20(CPUHPPAState *env, target_ureg r1,
> + target_ureg r2, vaddr va_b)
> +{
> + HPPATLBEntry *ent;
> + vaddr va_e;
> + uint64_t va_size;
> + int mask_shift;
> +
> + mask_shift = 2 * (r1 & 0xf);
> + va_size = TARGET_PAGE_SIZE << mask_shift;
Coverity suggests this needs a cast too, for the same reason:
shift of a 32-bit value by a shift that might overflow.
(CID 1523908)
> + va_b &= -va_size;
> + va_e = va_b + va_size - 1;
> +
thanks
-- PMM
