Based-on: 20231123185122.1100436-1-dbarb...@ventanamicro.com
("[PATCH for-9.0 v11 00/18] rv64i and rva22u64 CPUs, RVA22U64 profile support")Hi, This series builds upon the RVA22U64 support to add the supervisor mode profile RVA22S64 [1]. Patch 1 adds a new named feature called 'svade', which is a glorified way of telling "we do not want svadu". More info in the commit message. Patches 2, 3, 4 and 5 adds additional wiring to support supervisor profiles. We need support for priv_ver and satp_mode requirements. Patch 6 describes the profile. After all the work done previously in RVA22U64 we just need a profile description and we're set. Patch 7 adds a new rva22s64 CPU in similar fashion as the rva22u64 CPU added previously. [1] https://github.com/riscv/riscv-profiles/blob/main/profiles.adoc Daniel Henrique Barboza (7): target/riscv: implement svade target/riscv: add priv ver restriction to profiles target/riscv/cpu.c: finalize satp_mode earlier target/riscv/cpu: add riscv_cpu_is_32bit() target/riscv: add satp_mode profile support target/riscv: add RVA22S64 profile target/riscv: add rva22s64 cpu target/riscv/cpu-qom.h | 1 + target/riscv/cpu.c | 74 ++++++++++++++++++++++++++++++----- target/riscv/cpu.h | 4 ++ target/riscv/cpu_cfg.h | 1 + target/riscv/tcg/tcg-cpu.c | 80 ++++++++++++++++++++++++++++++++++++++ 5 files changed, 151 insertions(+), 9 deletions(-) -- 2.41.0
