Not strictly accurate for Sparc64 but avoid confusing Valgrind. Reported-by: Michael S. Tsirkin <m...@redhat.com> Signed-off-by: Blue Swirl <blauwir...@gmail.com> --- target-sparc/cpu.h | 5 +++-- target-sparc/cpu_init.c | 1 + 2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h index 38a7074..b81779b 100644 --- a/target-sparc/cpu.h +++ b/target-sparc/cpu.h @@ -413,14 +413,15 @@ typedef struct CPUSPARCState { #if !defined(TARGET_SPARC64) int psref; /* enable fpu */ #endif - target_ulong version; int interrupt_index; - uint32_t nwindows; /* NOTE: we allow 8 more registers to handle wrapping */ target_ulong regbase[MAX_NWINDOWS * 16 + 8]; CPU_COMMON + target_ulong version; + uint32_t nwindows; + /* MMU regs */ #if defined(TARGET_SPARC64) uint64_t lsu; diff --git a/target-sparc/cpu_init.c b/target-sparc/cpu_init.c index c7269b5..bd4ab6a 100644 --- a/target-sparc/cpu_init.c +++ b/target-sparc/cpu_init.c @@ -30,6 +30,7 @@ void cpu_reset(CPUSPARCState *env) log_cpu_state(env, 0); } + memset(env, 0, offsetof(CPUSPARCState, breakpoints)); tlb_flush(env, 1); env->cwp = 0; #ifndef TARGET_SPARC64 -- 1.7.9
From 5c46dbc58893bba4b5890f536040524e44ebc961 Mon Sep 17 00:00:00 2001 Message-Id: <5c46dbc58893bba4b5890f536040524e44ebc961.1331463238.git.blauwir...@gmail.com> In-Reply-To: <4bd3c025d124cc8ce66346143d5ec906e565c47a.1331463238.git.blauwir...@gmail.com> References: <4bd3c025d124cc8ce66346143d5ec906e565c47a.1331463238.git.blauwir...@gmail.com> From: Blue Swirl <blauwir...@gmail.com> Date: Sat, 10 Mar 2012 17:55:05 +0000 Subject: [PATCH 2/3] sparc: reset CPU state on reset Not strictly accurate for Sparc64 but avoid confusing Valgrind. Reported-by: Michael S. Tsirkin <m...@redhat.com> Signed-off-by: Blue Swirl <blauwir...@gmail.com> --- target-sparc/cpu.h | 5 +++-- target-sparc/cpu_init.c | 1 + 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h index 38a7074..b81779b 100644 --- a/target-sparc/cpu.h +++ b/target-sparc/cpu.h @@ -413,14 +413,15 @@ typedef struct CPUSPARCState { #if !defined(TARGET_SPARC64) int psref; /* enable fpu */ #endif - target_ulong version; int interrupt_index; - uint32_t nwindows; /* NOTE: we allow 8 more registers to handle wrapping */ target_ulong regbase[MAX_NWINDOWS * 16 + 8]; CPU_COMMON + target_ulong version; + uint32_t nwindows; + /* MMU regs */ #if defined(TARGET_SPARC64) uint64_t lsu; diff --git a/target-sparc/cpu_init.c b/target-sparc/cpu_init.c index c7269b5..bd4ab6a 100644 --- a/target-sparc/cpu_init.c +++ b/target-sparc/cpu_init.c @@ -30,6 +30,7 @@ void cpu_reset(CPUSPARCState *env) log_cpu_state(env, 0); } + memset(env, 0, offsetof(CPUSPARCState, breakpoints)); tlb_flush(env, 1); env->cwp = 0; #ifndef TARGET_SPARC64 -- 1.7.2.5