On 1/13/24 08:38, Daniel Henrique Barboza wrote:
Signed-off-by: Daniel Henrique Barboza <dbarb...@ventanamicro.com>
---
target/riscv/insn_trans/trans_rvv.c.inc | 26 +++++++++++++++++--------
1 file changed, 18 insertions(+), 8 deletions(-)
diff --git a/target/riscv/insn_trans/trans_rvv.c.inc
b/target/riscv/insn_trans/trans_rvv.c.inc
index 804cfd6c7f..3782d0fa2f 100644
--- a/target/riscv/insn_trans/trans_rvv.c.inc
+++ b/target/riscv/insn_trans/trans_rvv.c.inc
@@ -3265,21 +3265,28 @@ static void endian_adjust(TCGv_i32 ofs, int sew)
#endif
}
-/* Load idx >= VLMAX ? 0 : vreg[idx] */
+/*
+ * Load idx >= VLMAX ? 0 : vreg[idx]
+ *
+ * This function assumes ctx->vl_eq_vlmax = true.
+ */
static void vec_element_loadx(DisasContext *s, TCGv_i64 dest,
- int vreg, TCGv idx, int vlmax)
+ int vreg, TCGv idx)
I think removing the cpu configuration constant is a mistake.
Compile-time constants are always better than computation...
+#ifdef TARGET_RISCV64
+ tcg_gen_mov_i64(t_vlmax, cpu_vl);
+#else
+ tcg_gen_extu_tl_i64(t_vlmax, cpu_vl);
+#endif
That said, no ifdef required -- the second statement should always work.
r~
