On 17/1/24 04:19, Richard Henderson wrote:
On 1/17/24 09:19, Philippe Mathieu-Daudé wrote:
+ case 0x4 | 0x1: /* cc == 1 || cc == 3 => (cc & 1) != 0 */
+ cond = TCG_COND_TSTNE;
+ c->u.s32.b = tcg_constant_i32(1);
Don't we need to AND?
c->u.s32.a = tcg_temp_new_i32();
tcg_gen_andi_i32(c->u.s32.a, cc_op, 1);
No, that's the TSTNE cond there.
This patch as is was too complex for me so I split it in very
dumb steps to get a trivial patch:
https://lore.kernel.org/qemu-devel/20240119232302.50393-6-phi...@linaro.org/.
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
