Hi, Peter, On Fri, Jan 19, 2024 at 04:35:07PM +0000, Peter Maydell wrote: > I wrote this ages ago and recently picked it back up because of a > recent PCI related reset ordering problem noted by Peter Xu. I'm not > sure if this patchset is necessary as a part of fixing that ordering > problem (it might even be possible now to have the intel_iommu device > use 3-phase reset and put the relevant parts of its reset into the > 'exit' phase), but either way we really ought to do this cleanup > to reduce the amount of legacy/transitional handling we have.
The VFIO issue I was working on may not directly benefit from this series iiuc, as it's more of an special ordering on both (1) VFIO special case reset path using qemu_register_reset(), and (2) VT-d device is not put at the right place in the QOM hierachy [1]. Said that, thanks a lot for posting the patches; they all look reasonable and good cleanups to the reset infrastructure, afaict. [1] https://lore.kernel.org/r/ZapYii9nr5Tj9ClE@x1n -- Peter Xu
