On Fri, Feb 2, 2024 at 1:11 AM Alexey Baturo <baturo.ale...@gmail.com> wrote: > > From: Alexey Baturo <baturo.ale...@gmail.com> > > Hi, > > This patch series is rebased on > https://github.com/alistair23/qemu/tree/riscv-to-apply.next
Thanks! Applied to riscv-to-apply.next Alistair > > Thanks > > [v5]: > This patch series targets Zjpm v0.8 extension. > The spec itself could be found here: > https://github.com/riscv/riscv-j-extension/blob/8088461d8d66a7676872b61c908cbeb7cf5c5d1d/zjpm-spec.pdf > This patch series is updated after the suggested comments: > - add "x-" to the extension names to indicate experimental > > [v4]: > Patch series updated after the suggested comments: > - removed J-letter extension as it's unused > - renamed and fixed function to detect if address should be sign-extended > - zeroed unused context variables and moved computation logic to another patch > - bumped pointer masking version_id and minimum_version_id by 1 > > [v3]: > There patches are updated after Richard's comments: > - moved new tb flags to the end > - used tcg_gen_(s)extract to get the final address > - properly handle CONFIG_USER_ONLY > > [v2]: > As per Richard's suggestion I made pmm field part of tb_flags. > It allowed to get rid of global variable to store pmlen. > Also it allowed to simplify all the machinery around it. > > [v1]: > It looks like Zjpm v0.8 is almost frozen and we don't expect it change > drastically anymore. > Compared to the original implementation with explicit base and mask CSRs, we > now only have > several fixed options for number of masked bits which are set using existing > CSRs. > The changes have been tested with handwritten assembly tests and LLVM HWASAN > test suite. > > Alexey Baturo (6): > target/riscv: Remove obsolete pointer masking extension code. > target/riscv: Add new CSR fields for S{sn,mn,m}pm extensions as part > of Zjpm v0.8 > target/riscv: Add helper functions to calculate current number of > masked bits for pointer masking > target/riscv: Add pointer masking tb flags > target/riscv: Update address modify functions to take into account > pointer masking > target/riscv: Enable updates for pointer masking variables and thus > enable pointer masking extension > > target/riscv/cpu.c | 22 ++++---- > target/riscv/cpu.h | 47 ++++++++--------- > target/riscv/cpu_bits.h | 90 ++------------------------------- > target/riscv/cpu_cfg.h | 3 ++ > target/riscv/cpu_helper.c | 97 ++++++++++++++++++++---------------- > target/riscv/csr.c | 41 ++++----------- > target/riscv/machine.c | 22 +++----- > target/riscv/pmp.c | 13 +++-- > target/riscv/pmp.h | 11 ++-- > target/riscv/tcg/tcg-cpu.c | 5 +- > target/riscv/translate.c | 46 +++++++---------- > target/riscv/vector_helper.c | 15 +++++- > 12 files changed, 160 insertions(+), 252 deletions(-) > > -- > 2.34.1 > >
