On 2/6/24 23:29, Peter Maydell wrote:
We currently guard the CFG3 register read with
  (scc_partno(s) == 0x524 && scc_partno(s) == 0x547)
which is clearly wrong as it is never true.

This register is present on all board types except AN524
and AN527; correct the condition.

Fixes: 6ac80818941829c0 ("hw/misc/mps2-scc: Implement changes for AN547")
Signed-off-by: Peter Maydell<peter.mayd...@linaro.org>
---
  hw/misc/mps2-scc.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

Reviewed-by: Richard Henderson <richard.hender...@linaro.org>

r~

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