Embed CPUAlphaState in AlphaCPU. Signed-off-by: Andreas Färber <afaer...@suse.de> --- Makefile.target | 1 + target-alpha/cpu-qom.h | 74 +++++++++++++++++++++++++++ target-alpha/cpu.c | 127 ++++++++++++++++++++++++++++++++++++++++++++++ target-alpha/cpu.h | 1 + target-alpha/translate.c | 60 +++------------------- 5 files changed, 211 insertions(+), 52 deletions(-) create mode 100644 target-alpha/cpu-qom.h create mode 100644 target-alpha/cpu.c
diff --git a/Makefile.target b/Makefile.target index 47854a7..74604fd 100644 --- a/Makefile.target +++ b/Makefile.target @@ -87,6 +87,7 @@ endif libobj-$(TARGET_SPARC64) += vis_helper.o libobj-$(CONFIG_NEED_MMU) += mmu.o libobj-$(TARGET_ARM) += neon_helper.o iwmmxt_helper.o +libobj-$(TARGET_ALPHA) += cpu.o libobj-$(TARGET_ARM) += cpu.o libobj-$(TARGET_M68K) += cpu.o ifeq ($(TARGET_BASE_ARCH), mips) diff --git a/target-alpha/cpu-qom.h b/target-alpha/cpu-qom.h new file mode 100644 index 0000000..889d05c --- /dev/null +++ b/target-alpha/cpu-qom.h @@ -0,0 +1,74 @@ +/* + * QEMU Alpha CPU + * + * Copyright (c) 2012 SUSE LINUX Products GmbH + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see + * <http://www.gnu.org/licenses/lgpl-2.1.html> + */ +#ifndef QEMU_ALPHA_CPU_QOM_H +#define QEMU_ALPHA_CPU_QOM_H + +#include "qemu/cpu.h" +#include "cpu.h" + +#define TYPE_ALPHA_CPU "alpha-cpu" + +#define ALPHA_CPU_CLASS(klass) \ + OBJECT_CLASS_CHECK(AlphaCPUClass, (klass), TYPE_ALPHA_CPU) +#define ALPHA_CPU(obj) \ + OBJECT_CHECK(AlphaCPU, (obj), TYPE_ALPHA_CPU) +#define ALPHA_CPU_GET_CLASS(obj) \ + OBJECT_GET_CLASS(AlphaCPUClass, (obj), TYPE_ALPHA_CPU) + +/** + * AlphaCPUClass: + * @parent_reset: The parent class' reset handler. + * + * An Alpha CPU model. + */ +typedef struct AlphaCPUClass { + /*< private >*/ + CPUClass parent_class; + /*< public >*/ + + void (*parent_reset)(CPUState *cpu); + + int implver; + int amask; +} AlphaCPUClass; + +/** + * AlphaCPU: + * @env: Legacy CPU state. + * + * An Alpha CPU. + */ +typedef struct AlphaCPU { + /*< private >*/ + CPUState parent_obj; + /*< public >*/ + + CPUAlphaState env; +} AlphaCPU; + +static inline AlphaCPU *alpha_env_get_cpu(CPUAlphaState *env) +{ + return ALPHA_CPU(container_of(env, AlphaCPU, env)); +} + +#define ENV_GET_CPU(e) CPU(alpha_env_get_cpu(e)) + + +#endif diff --git a/target-alpha/cpu.c b/target-alpha/cpu.c new file mode 100644 index 0000000..f5c037f --- /dev/null +++ b/target-alpha/cpu.c @@ -0,0 +1,127 @@ +/* + * QEMU Alpha CPU + * + * Copyright (c) 2012 SUSE LINUX Products GmbH + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see + * <http://www.gnu.org/licenses/lgpl-2.1.html> + */ + +#include "cpu-qom.h" +#include "qemu-common.h" + +static void alpha_cpu_reset(CPUState *c) +{ + AlphaCPU *cpu = ALPHA_CPU(c); + AlphaCPUClass *klass = ALPHA_CPU_GET_CLASS(cpu); + + klass->parent_reset(c); +} + +/* CPU models */ + +typedef struct AlphaCPUInfo { + const char *name; + int implver, amask; +} AlphaCPUInfo; + +static const AlphaCPUInfo alpha_cpus[] = { + { "ev4", IMPLVER_2106x, 0 }, + { "ev5", IMPLVER_21164, 0 }, + { "ev56", IMPLVER_21164, AMASK_BWX }, + { "pca56", IMPLVER_21164, AMASK_BWX | AMASK_MVI }, + { "ev6", IMPLVER_21264, AMASK_BWX | AMASK_FIX | AMASK_MVI | AMASK_TRAP }, + { "ev67", IMPLVER_21264, (AMASK_BWX | AMASK_FIX | AMASK_CIX + | AMASK_MVI | AMASK_TRAP | AMASK_PREFETCH), }, + { "ev68", IMPLVER_21264, (AMASK_BWX | AMASK_FIX | AMASK_CIX + | AMASK_MVI | AMASK_TRAP | AMASK_PREFETCH), }, + { "21064", IMPLVER_2106x, 0 }, + { "21164", IMPLVER_21164, 0 }, + { "21164a", IMPLVER_21164, AMASK_BWX }, + { "21164pc", IMPLVER_21164, AMASK_BWX | AMASK_MVI }, + { "21264", IMPLVER_21264, AMASK_BWX | AMASK_FIX | AMASK_MVI | AMASK_TRAP }, + { "21264a", IMPLVER_21264, (AMASK_BWX | AMASK_FIX | AMASK_CIX + | AMASK_MVI | AMASK_TRAP | AMASK_PREFETCH), } +}; + +static void alpha_cpu_initfn(Object *obj) +{ + AlphaCPU *cpu = ALPHA_CPU(obj); + AlphaCPUClass *klass = ALPHA_CPU_GET_CLASS(cpu); + CPUAlphaState *env = &cpu->env; + + env->implver = klass->implver; + env->amask = klass->amask; + + memset(env, 0, sizeof(CPUAlphaState)); + cpu_exec_init(env); + tlb_flush(env, 1); + +#if defined(CONFIG_USER_ONLY) + env->ps = PS_USER_MODE; + cpu_alpha_store_fpcr(env, (FPCR_INVD | FPCR_DZED | FPCR_OVFD + | FPCR_UNFD | FPCR_INED | FPCR_DNOD)); +#endif + env->lock_addr = -1; + env->fen = 1; +} + +static void alpha_cpu_class_init(ObjectClass *klass, void *data) +{ + AlphaCPUClass *k = ALPHA_CPU_CLASS(klass); + CPUClass *cpu_class = CPU_CLASS(klass); + const AlphaCPUInfo *info = data; + + k->parent_reset = cpu_class->reset; + cpu_class->reset = alpha_cpu_reset; + + k->implver = info->implver; + k->amask = info->amask; +} + +static void alpha_register_cpu(const AlphaCPUInfo *info) +{ + TypeInfo type = { + .name = info->name, + .parent = TYPE_ALPHA_CPU, + .instance_size = sizeof(AlphaCPU), + .instance_init = alpha_cpu_initfn, + .class_size = sizeof(AlphaCPUClass), + .class_init = alpha_cpu_class_init, + .class_data = (void *)info, + }; + + type_register_static(&type); +} + +static const TypeInfo alpha_cpu_info = { + .name = TYPE_ALPHA_CPU, + .parent = TYPE_CPU, + .instance_size = sizeof(AlphaCPU), + .instance_init = alpha_cpu_initfn, + .abstract = true, + .class_size = sizeof(AlphaCPUClass), +}; + +static void alpha_cpu_register_types(void) +{ + int i; + + type_register_static(&alpha_cpu_info); + for (i = 0; i < ARRAY_SIZE(alpha_cpus); i++) { + alpha_register_cpu(&alpha_cpus[i]); + } +} + +type_init(alpha_cpu_register_types) diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h index 48c0fdc..4126b3d 100644 --- a/target-alpha/cpu.h +++ b/target-alpha/cpu.h @@ -293,6 +293,7 @@ struct CPUAlphaState { #define cpu_signal_handler cpu_alpha_signal_handler #include "cpu-all.h" +#include "cpu-qom.h" enum { FEATURE_ASN = 0x00000001, diff --git a/target-alpha/translate.c b/target-alpha/translate.c index b51fe5c..d51000b 100644 --- a/target-alpha/translate.c +++ b/target-alpha/translate.c @@ -3460,63 +3460,19 @@ void gen_intermediate_code_pc (CPUAlphaState *env, struct TranslationBlock *tb) gen_intermediate_code_internal(env, tb, 1); } -struct cpu_def_t { - const char *name; - int implver, amask; -}; - -static const struct cpu_def_t cpu_defs[] = { - { "ev4", IMPLVER_2106x, 0 }, - { "ev5", IMPLVER_21164, 0 }, - { "ev56", IMPLVER_21164, AMASK_BWX }, - { "pca56", IMPLVER_21164, AMASK_BWX | AMASK_MVI }, - { "ev6", IMPLVER_21264, AMASK_BWX | AMASK_FIX | AMASK_MVI | AMASK_TRAP }, - { "ev67", IMPLVER_21264, (AMASK_BWX | AMASK_FIX | AMASK_CIX - | AMASK_MVI | AMASK_TRAP | AMASK_PREFETCH), }, - { "ev68", IMPLVER_21264, (AMASK_BWX | AMASK_FIX | AMASK_CIX - | AMASK_MVI | AMASK_TRAP | AMASK_PREFETCH), }, - { "21064", IMPLVER_2106x, 0 }, - { "21164", IMPLVER_21164, 0 }, - { "21164a", IMPLVER_21164, AMASK_BWX }, - { "21164pc", IMPLVER_21164, AMASK_BWX | AMASK_MVI }, - { "21264", IMPLVER_21264, AMASK_BWX | AMASK_FIX | AMASK_MVI | AMASK_TRAP }, - { "21264a", IMPLVER_21264, (AMASK_BWX | AMASK_FIX | AMASK_CIX - | AMASK_MVI | AMASK_TRAP | AMASK_PREFETCH), } -}; - -CPUAlphaState * cpu_alpha_init (const char *cpu_model) +CPUAlphaState *cpu_alpha_init(const char *cpu_model) { + AlphaCPU *cpu; CPUAlphaState *env; - int implver, amask, i, max; - - env = g_malloc0(sizeof(CPUAlphaState)); - cpu_exec_init(env); - alpha_translate_init(); - tlb_flush(env, 1); - /* Default to ev67; no reason not to emulate insns by default. */ - implver = IMPLVER_21264; - amask = (AMASK_BWX | AMASK_FIX | AMASK_CIX | AMASK_MVI - | AMASK_TRAP | AMASK_PREFETCH); - - max = ARRAY_SIZE(cpu_defs); - for (i = 0; i < max; i++) { - if (strcmp (cpu_model, cpu_defs[i].name) == 0) { - implver = cpu_defs[i].implver; - amask = cpu_defs[i].amask; - break; - } + if (object_class_by_name(cpu_model) == NULL) { + /* Default to ev67; no reason not to emulate insns by default. */ + cpu_model = "ev67"; } - env->implver = implver; - env->amask = amask; + cpu = ALPHA_CPU(object_new(cpu_model)); + env = &cpu->env; -#if defined (CONFIG_USER_ONLY) - env->ps = PS_USER_MODE; - cpu_alpha_store_fpcr(env, (FPCR_INVD | FPCR_DZED | FPCR_OVFD - | FPCR_UNFD | FPCR_INED | FPCR_DNOD)); -#endif - env->lock_addr = -1; - env->fen = 1; + alpha_translate_init(); qemu_init_vcpu(env); return env; -- 1.7.7
