On 2/23/24 00:32, Jinjie Ruan via wrote:
In CPU Interface, if the IRQ has the superpriority property, report NMI to the corresponding PE.Signed-off-by: Jinjie Ruan <ruanjin...@huawei.com> --- v3: - Remove handling nmi_is_irq flag. --- hw/intc/arm_gicv3_cpuif.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/hw/intc/arm_gicv3_cpuif.c b/hw/intc/arm_gicv3_cpuif.c index f5bf8df32b..3ffeb9543b 100644 --- a/hw/intc/arm_gicv3_cpuif.c +++ b/hw/intc/arm_gicv3_cpuif.c @@ -931,6 +931,7 @@ void gicv3_cpuif_update(GICv3CPUState *cs) /* Tell the CPU about its highest priority pending interrupt */ int irqlevel = 0; int fiqlevel = 0; + int nmilevel = 0; ARMCPU *cpu = ARM_CPU(cs->cpu); CPUARMState *env = &cpu->env;@@ -967,7 +968,9 @@ void gicv3_cpuif_update(GICv3CPUState *cs)g_assert_not_reached(); }- if (isfiq) {+ if (cs->hppi.superprio) { + nmilevel = 1; + } else if (isfiq) { fiqlevel = 1; } else { irqlevel = 1;
NMI only applies to group 1, per Table 4-6. Because group 0 always produces fiq, I think you need to swap the ordering of the IFs.
r~
