On Thu, Feb 22, 2024 at 11:40:10AM +0800, Jiqian Chen wrote:
> In current code, when guest does S3, virtio devices are reset due to
> the bit No_Soft_Reset is not set. After resetting, the display resources
> of virtio-gpu are destroyed, then the display can't come back and only
> show blank after resuming.
>
> Implement No_Soft_Reset bit of PCI_PM_CTRL register, then guest can check
> this bit, if this bit is set, the devices resetting will not be done, and
> then the display can work after resuming.
>
> Signed-off-by: Jiqian Chen <jiqian.c...@amd.com>
> ---
> hw/virtio/virtio-pci.c | 37 +++++++++++++++++++++++++++++++++-
> include/hw/virtio/virtio-pci.h | 5 +++++
> 2 files changed, 41 insertions(+), 1 deletion(-)
>
> diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c
> index 1a7039fb0c68..da5312010345 100644
> --- a/hw/virtio/virtio-pci.c
> +++ b/hw/virtio/virtio-pci.c
> @@ -2197,6 +2197,11 @@ static void virtio_pci_realize(PCIDevice *pci_dev,
> Error **errp)
> pcie_cap_lnkctl_init(pci_dev);
> }
>
> + if (proxy->flags & VIRTIO_PCI_FLAG_PM_NO_SOFT_RESET) {
> + pci_set_word(pci_dev->config + pos + PCI_PM_CTRL,
> + PCI_PM_CTRL_NO_SOFT_RESET);
> + }
> +
> if (proxy->flags & VIRTIO_PCI_FLAG_INIT_PM) {
> /* Init Power Management Control Register */
> pci_set_word(pci_dev->wmask + pos + PCI_PM_CTRL,
Don't we need compat machinery to avoid breaking migration for
existing machine types?
> @@ -2259,18 +2264,46 @@ static void virtio_pci_reset(DeviceState *qdev)
> }
> }
>
> +static bool device_no_need_reset(PCIDevice *dev)
> +{
> + if (pci_is_express(dev)) {
> + uint16_t pmcsr;
> +
> + pmcsr = pci_get_word(dev->config + dev->exp.pm_cap + PCI_PM_CTRL);
> + /*
> + * When No_Soft_Reset bit is set and device
the device
> + * is in D3hot state, can't reset device
can't? or don't?
> + */
> + if ((pmcsr & PCI_PM_CTRL_NO_SOFT_RESET) &&
> + (pmcsr & PCI_PM_CTRL_STATE_MASK) == 3)
> + return true;
coding style violation
> + }
> +
> + return false;
> +}
> +
> static void virtio_pci_bus_reset_hold(Object *obj)
> {
> PCIDevice *dev = PCI_DEVICE(obj);
> DeviceState *qdev = DEVICE(obj);
>
> + if (device_no_need_reset(dev))
> + return;
> +
> virtio_pci_reset(qdev);
>
> if (pci_is_express(dev)) {
> + uint16_t pmcsr;
> + uint16_t val = 0;
> +
> pcie_cap_deverr_reset(dev);
> pcie_cap_lnkctl_reset(dev);
>
> - pci_set_word(dev->config + dev->exp.pm_cap + PCI_PM_CTRL, 0);
> + /* don't reset the RO bits */
> + pmcsr = pci_get_word(dev->config + dev->exp.pm_cap + PCI_PM_CTRL);
> + val = val | (pmcsr & PCI_PM_CTRL_NO_SOFT_RESET) |
> + (pmcsr & PCI_PM_CTRL_DATA_SCALE_MASK);
> + pci_set_word(dev->config + dev->exp.pm_cap + PCI_PM_CTRL, val);
First, we have test and clear for this.
Second, this has to be conditional on the flag, no?
Without the flag don't we reset everything?
Or you can reuse wmask for this, also an option.
Also what's going on with PCI_PM_CTRL_DATA_SCALE_MASK?
Where does that come from?
> }
> }
>
> @@ -2297,6 +2330,8 @@ static Property virtio_pci_properties[] = {
> VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT, true),
> DEFINE_PROP_BIT("x-pcie-pm-init", VirtIOPCIProxy, flags,
> VIRTIO_PCI_FLAG_INIT_PM_BIT, true),
> + DEFINE_PROP_BIT("x-pcie-pm-no-soft-reset", VirtIOPCIProxy, flags,
> + VIRTIO_PCI_FLAG_PM_NO_SOFT_RESET_BIT, true),
> DEFINE_PROP_BIT("x-pcie-flr-init", VirtIOPCIProxy, flags,
> VIRTIO_PCI_FLAG_INIT_FLR_BIT, true),
> DEFINE_PROP_BIT("aer", VirtIOPCIProxy, flags,
> diff --git a/include/hw/virtio/virtio-pci.h b/include/hw/virtio/virtio-pci.h
> index 59d88018c16a..9e67ba38c748 100644
> --- a/include/hw/virtio/virtio-pci.h
> +++ b/include/hw/virtio/virtio-pci.h
> @@ -43,6 +43,7 @@ enum {
> VIRTIO_PCI_FLAG_INIT_FLR_BIT,
> VIRTIO_PCI_FLAG_AER_BIT,
> VIRTIO_PCI_FLAG_ATS_PAGE_ALIGNED_BIT,
> + VIRTIO_PCI_FLAG_PM_NO_SOFT_RESET_BIT,
> };
>
> /* Need to activate work-arounds for buggy guests at vmstate load. */
> @@ -79,6 +80,10 @@ enum {
> /* Init Power Management */
> #define VIRTIO_PCI_FLAG_INIT_PM (1 << VIRTIO_PCI_FLAG_INIT_PM_BIT)
>
> +/* Init The No_Soft_Reset bit of Power Management */
> +#define VIRTIO_PCI_FLAG_PM_NO_SOFT_RESET \
> + (1 << VIRTIO_PCI_FLAG_PM_NO_SOFT_RESET_BIT)
> +
> /* Init Function Level Reset capability */
> #define VIRTIO_PCI_FLAG_INIT_FLR (1 << VIRTIO_PCI_FLAG_INIT_FLR_BIT)
>
> --
> 2.34.1
