Replace qemu_printf() by monitor_printf() / monitor_puts() in monitor.
Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
---
target/xtensa/mmu.h | 2 +-
target/xtensa/monitor.c | 117 ++++++++++++++++++++--------------------
2 files changed, 61 insertions(+), 58 deletions(-)
diff --git a/target/xtensa/mmu.h b/target/xtensa/mmu.h
index 3e1d2c03ea..ef7504e16e 100644
--- a/target/xtensa/mmu.h
+++ b/target/xtensa/mmu.h
@@ -90,6 +90,6 @@ int xtensa_get_physical_addr(CPUXtensaState *env, bool
update_tlb,
unsigned *access);
void xtensa_reset_mmu(CPUXtensaState *env);
-void xtensa_dump_mmu(CPUXtensaState *env);
+void xtensa_dump_mmu(Monitor *mon, CPUXtensaState *env);
#endif
diff --git a/target/xtensa/monitor.c b/target/xtensa/monitor.c
index 9ba068d624..1c3dc85ea1 100644
--- a/target/xtensa/monitor.c
+++ b/target/xtensa/monitor.c
@@ -22,7 +22,6 @@
* THE SOFTWARE.
*/
#include "qemu/osdep.h"
-#include "qemu/qemu-print.h"
#include "qemu/units.h"
#include "monitor/monitor.h"
#include "monitor/hmp-target.h"
@@ -31,7 +30,7 @@
#include "mmu.h"
-static void dump_tlb(CPUXtensaState *env, bool dtlb)
+static void dump_tlb(Monitor *mon, CPUXtensaState *env, bool dtlb)
{
unsigned wi, ei;
const xtensa_tlb *conf =
@@ -40,7 +39,7 @@ static void dump_tlb(CPUXtensaState *env, bool dtlb)
xtensa_option_enabled(env->config, XTENSA_OPTION_MMU) ?
mmu_attr_to_access : region_attr_to_access;
- qemu_printf("%s:\n", dtlb ? "DTLB" : "IBLB");
+ monitor_puts(mon, dtlb ? "DTLB\n" : "IBLB\n");
for (wi = 0; wi < conf->nways; ++wi) {
uint32_t sz = ~xtensa_tlb_get_addr_mask(env, dtlb, wi) + 1;
const char *sz_text;
@@ -71,35 +70,39 @@ static void dump_tlb(CPUXtensaState *env, bool dtlb)
if (print_header) {
print_header = false;
- qemu_printf("Way %u (%d %s)\n", wi, sz, sz_text);
- qemu_printf("\tVaddr Paddr ASID Attr RWX
Cache\n"
- "\t---------- ---------- ---- ---- ---
-------\n");
+ monitor_printf(mon,
+ "Way %u (%d %s)\n", wi, sz, sz_text);
+ monitor_puts(mon,
+ "\tVaddr Paddr ASID Attr RWX
Cache\n"
+ "\t---------- ---------- ---- ---- ---
-------\n");
}
- qemu_printf("\t0x%08x 0x%08x 0x%02x 0x%02x %c%c%c %s\n",
- entry->vaddr,
- entry->paddr,
- entry->asid,
- entry->attr,
- (access & PAGE_READ) ? 'R' : '-',
- (access & PAGE_WRITE) ? 'W' : '-',
- (access & PAGE_EXEC) ? 'X' : '-',
- cache_text[cache_idx] ?
- cache_text[cache_idx] : "Invalid");
+ monitor_printf(mon,
+ "\t0x%08x 0x%08x 0x%02x 0x%02x %c%c%c %s\n",
+ entry->vaddr,
+ entry->paddr,
+ entry->asid,
+ entry->attr,
+ (access & PAGE_READ) ? 'R' : '-',
+ (access & PAGE_WRITE) ? 'W' : '-',
+ (access & PAGE_EXEC) ? 'X' : '-',
+ cache_text[cache_idx] ?
+ cache_text[cache_idx] : "Invalid");
}
}
}
}
-static void dump_mpu(CPUXtensaState *env, const char *map_desc,
+static void dump_mpu(Monitor *mon, CPUXtensaState *env, const char *map_desc,
const xtensa_mpu_entry *entry, unsigned n)
{
unsigned i;
- qemu_printf("%s map:\n", map_desc);
- qemu_printf("\t%s Vaddr Attr Ring0 Ring1 System Type
CPU cache\n"
- "\t%s ---------- ---------- ----- ----- -------------
---------\n",
- env ? "En" : " ",
- env ? "--" : " ");
+ monitor_printf(mon, "%s map:\n", map_desc);
+ monitor_printf(mon,
+ "\t%s Vaddr Attr Ring0 Ring1 System Type
CPU cache\n"
+ "\t%s ---------- ---------- ----- ----- -------------
---------\n",
+ env ? "En" : " ",
+ env ? "--" : " ");
for (i = 0; i < n; ++i) {
uint32_t attr = entry[i].attr;
@@ -108,64 +111,64 @@ static void dump_mpu(CPUXtensaState *env, const char
*map_desc,
unsigned type = mpu_attr_to_type(attr);
char cpu_cache = (type & XTENSA_MPU_TYPE_CPU_CACHE) ? '-' : ' ';
- qemu_printf("\t %c 0x%08x 0x%08x %c%c%c %c%c%c ",
- env ?
- ((env->sregs[MPUENB] & (1u << i)) ? '+' : '-') : ' ',
- entry[i].vaddr, attr,
- (access0 & PAGE_READ) ? 'R' : '-',
- (access0 & PAGE_WRITE) ? 'W' : '-',
- (access0 & PAGE_EXEC) ? 'X' : '-',
- (access1 & PAGE_READ) ? 'R' : '-',
- (access1 & PAGE_WRITE) ? 'W' : '-',
- (access1 & PAGE_EXEC) ? 'X' : '-');
+ monitor_printf(mon, "\t %c 0x%08x 0x%08x %c%c%c %c%c%c ",
+ env ?
+ ((env->sregs[MPUENB] & (1u << i)) ? '+' : '-') : ' ',
+ entry[i].vaddr, attr,
+ (access0 & PAGE_READ) ? 'R' : '-',
+ (access0 & PAGE_WRITE) ? 'W' : '-',
+ (access0 & PAGE_EXEC) ? 'X' : '-',
+ (access1 & PAGE_READ) ? 'R' : '-',
+ (access1 & PAGE_WRITE) ? 'W' : '-',
+ (access1 & PAGE_EXEC) ? 'X' : '-');
switch (type & XTENSA_MPU_SYSTEM_TYPE_MASK) {
case XTENSA_MPU_SYSTEM_TYPE_DEVICE:
- qemu_printf("Device %cB %3s\n",
- (type & XTENSA_MPU_TYPE_B) ? ' ' : 'n',
- (type & XTENSA_MPU_TYPE_INT) ? "int" : "");
+ monitor_printf(mon, "Device %cB %3s\n",
+ (type & XTENSA_MPU_TYPE_B) ? ' ' : 'n',
+ (type & XTENSA_MPU_TYPE_INT) ? "int" : "");
break;
case XTENSA_MPU_SYSTEM_TYPE_NC:
- qemu_printf("Sys NC %cB %c%c%c\n",
- (type & XTENSA_MPU_TYPE_B) ? ' ' : 'n',
- (type & XTENSA_MPU_TYPE_CPU_R) ? 'r' : cpu_cache,
- (type & XTENSA_MPU_TYPE_CPU_W) ? 'w' : cpu_cache,
- (type & XTENSA_MPU_TYPE_CPU_C) ? 'c' : cpu_cache);
+ monitor_printf(mon, "Sys NC %cB %c%c%c\n",
+ (type & XTENSA_MPU_TYPE_B) ? ' ' : 'n',
+ (type & XTENSA_MPU_TYPE_CPU_R) ? 'r' : cpu_cache,
+ (type & XTENSA_MPU_TYPE_CPU_W) ? 'w' : cpu_cache,
+ (type & XTENSA_MPU_TYPE_CPU_C) ? 'c' : cpu_cache);
break;
case XTENSA_MPU_SYSTEM_TYPE_C:
- qemu_printf("Sys C %c%c%c %c%c%c\n",
- (type & XTENSA_MPU_TYPE_SYS_R) ? 'R' : '-',
- (type & XTENSA_MPU_TYPE_SYS_W) ? 'W' : '-',
- (type & XTENSA_MPU_TYPE_SYS_C) ? 'C' : '-',
- (type & XTENSA_MPU_TYPE_CPU_R) ? 'r' : cpu_cache,
- (type & XTENSA_MPU_TYPE_CPU_W) ? 'w' : cpu_cache,
- (type & XTENSA_MPU_TYPE_CPU_C) ? 'c' : cpu_cache);
+ monitor_printf(mon, "Sys C %c%c%c %c%c%c\n",
+ (type & XTENSA_MPU_TYPE_SYS_R) ? 'R' : '-',
+ (type & XTENSA_MPU_TYPE_SYS_W) ? 'W' : '-',
+ (type & XTENSA_MPU_TYPE_SYS_C) ? 'C' : '-',
+ (type & XTENSA_MPU_TYPE_CPU_R) ? 'r' : cpu_cache,
+ (type & XTENSA_MPU_TYPE_CPU_W) ? 'w' : cpu_cache,
+ (type & XTENSA_MPU_TYPE_CPU_C) ? 'c' : cpu_cache);
break;
default:
- qemu_printf("Unknown\n");
+ monitor_puts(mon, "Unknown\n");
break;
}
}
}
-void xtensa_dump_mmu(CPUXtensaState *env)
+void xtensa_dump_mmu(Monitor *mon, CPUXtensaState *env)
{
if (xtensa_option_bits_enabled(env->config,
XTENSA_OPTION_BIT(XTENSA_OPTION_REGION_PROTECTION) |
XTENSA_OPTION_BIT(XTENSA_OPTION_REGION_TRANSLATION) |
XTENSA_OPTION_BIT(XTENSA_OPTION_MMU))) {
- dump_tlb(env, false);
- qemu_printf("\n");
- dump_tlb(env, true);
+ dump_tlb(mon, env, false);
+ monitor_puts(mon, "\n");
+ dump_tlb(mon, env, true);
} else if (xtensa_option_enabled(env->config, XTENSA_OPTION_MPU)) {
- dump_mpu(env, "Foreground",
+ dump_mpu(mon, env, "Foreground",
env->mpu_fg, env->config->n_mpu_fg_segments);
- qemu_printf("\n");
- dump_mpu(NULL, "Background",
+ monitor_puts(mon, "\n");
+ dump_mpu(mon, NULL, "Background",
env->config->mpu_bg, env->config->n_mpu_bg_segments);
} else {
- qemu_printf("No TLB for this CPU core\n");
+ monitor_puts(mon, "No TLB for this CPU core\n");
}
}
@@ -177,5 +180,5 @@ void hmp_info_tlb(Monitor *mon, const QDict *qdict)
monitor_printf(mon, "No CPU available\n");
return;
}
- xtensa_dump_mmu(env1);
+ xtensa_dump_mmu(mon, env1);
}
--
2.41.0
