> > If we're going to use the class hierachy to implement functionality then > > there are other candidates. Given the primary purpose of QOM is [IMO] > > to handle interaction between devices, the external interface exposed by > > the core seems like a better candidate for subclassing. i.e. > > conventional ARM cores with IRQ and FIQ inputs[1] v.s. M profile devices > > where the core exception model is intimately tied to the interrupt > > controller. > > Yes, I think I'd agree there. So should we just have an init function > that provides the implementation-specific cp15 registers based on the value > provided in the QOM property for the main ID register?
Something like that, yes. I'm not convinced the main ID register is the right property to use, but for actual implementation specific bits (rather than bits where an implementation picks one of a few common options) I guess we don't have any alternative but enumerating the implementations we support. Paul
