W dniu 19.04.2024 o 20:31, Dorjoy Chowdhury pisze:
-uint64_t arm_build_mp_affinity(int idx, uint8_t clustersz)
+uint64_t arm_build_mp_affinity(ARMCPU *cpu, int idx, uint8_t clustersz)
{
+ if (cpu->has_smt) {
+ /*
+ * Right now, the ARM CPUs with SMT supported by QEMU only have
+ * one thread per core. So Aff0 is always 0.
+ */
+ uint32_t Aff2 = idx / clustersz;
+ uint32_t Aff1 = idx % clustersz;
+ uint32_t Aff0 = 0;
+ return (Aff2 << ARM_AFF2_SHIFT) | (Aff1 << ARM_AFF1_SHIFT) | Aff0;
+ }
Should "return" also have "(1 << 24) |" to have MT=1 set?
Otherwise MPIDR_EL1 = 0x000100 can mean core0 in cluster1 or core1 in
cluster0.
Value 0x1000100 shows MT=1 so thread0 in core1 in cluster0.
