W dniu 3.05.2024 o 17:34, Zenghui Yu pisze:
We wrongly encoded ID_AA64PFR1_EL1 using {3,0,0,4,2} in hvf_sreg_match[] so
we fail to get the expected ARMCPRegInfo from cp_regs hash table with the
wrong key.
Fix it with the correct encoding {3,0,0,4,1}. With that fixed, the Linux
guest can properly detect FEAT_SSBS2 on my M1 HW.
All DBG{B,W}{V,C}R_EL1 registers are also wrongly encoded with op0 == 14.
It happens to work because HVF_SYSREG(CRn, CRm, 14, op1, op2) equals to
HVF_SYSREG(CRn, CRm, 2, op1, op2), by definition. But we shouldn't rely on
it.
Fixes: a1477da3ddeb ("hvf: Add Apple Silicon support")
Signed-off-by: Zenghui Yu<zenghui...@linux.dev>
If your boot environment allows to run EFI binaries then my ArmCpuInfo
app [1] can be used to check values of system registers and flags
present in them.
https://github.com/hrw/edk2-armcpuinfo/releases/tag/v1.2.0
Example header:
ArmCpuInfo v1.2.0
ID_AA64MMFR0_EL1 = 0x0100032310201126
ID_AA64MMFR1_EL1 = 0x0010011010312122
ID_AA64MMFR2_EL1 = 0x1221011112011011
ID_AA64PFR0_EL1 = 0x1201001121112222
ID_AA64PFR1_EL1 = 0x0000000001000121
ID_AA64ISAR0_EL1 = 0x1221111110212120
ID_AA64ISAR1_EL1 = 0x0011111101211052
ID_AA64ISAR2_EL1 = 0x0000000000110000
ID_AA64DFR0_EL1 = 0x1000000010305609
ID_AA64SMFR0_EL1 = 0x80F100FD00000000
ID_AA64ZFR0_EL1 = 0x0110110100110021
Have to finish work on next release - it will show also values of
MMFR3/4, ISAR3, AFR0/1 and FPFR0 registers.
