On May 3 13:50, Vincent Fu wrote: > The number of PIDs is in the upper 16 bits of cdw10. So we need to > right-shift by 16 bits instead of only a single bit. > > Signed-off-by: Vincent Fu <vincent...@samsung.com> > --- > hw/nvme/ctrl.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c > index 127c3d2383..e89f9f7808 100644 > --- a/hw/nvme/ctrl.c > +++ b/hw/nvme/ctrl.c > @@ -4352,7 +4352,7 @@ static uint16_t nvme_io_mgmt_send_ruh_update(NvmeCtrl > *n, NvmeRequest *req) > NvmeNamespace *ns = req->ns; > uint32_t cdw10 = le32_to_cpu(cmd->cdw10); > uint16_t ret = NVME_SUCCESS; > - uint32_t npid = (cdw10 >> 1) + 1; > + uint32_t npid = (cdw10 >> 16) + 1; > unsigned int i = 0; > g_autofree uint16_t *pids = NULL; > uint32_t maxnpid; > -- > 2.43.0 >
Hi Vincent,
Thanks, LGTM! Applied to nvme-next!
Reviewed-by: Klaus Jensen <k.jen...@samsung.com>
I'll also add,
Cc: qemu-sta...@nongnu.org
Fixes: 73064edfb864 ("hw/nvme: flexible data placement emulation")
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