On Wed May 29, 2024 at 4:34 PM AEST, Cédric Le Goater wrote:
> On 5/26/24 14:26, Nicholas Piggin wrote:
> > Add helpers for TCG code to determine if there are SMT siblings
> > sharing per-core and per-lpar registers. This simplifies the
> > callers and makes SMT register topology simpler to modify with
> > later changes.
> >
> > Signed-off-by: Nicholas Piggin <npig...@gmail.com>
> > ---
> > target/ppc/cpu.h | 7 +++++++
> > target/ppc/cpu_init.c | 2 +-
> > target/ppc/excp_helper.c | 16 +++++++---------
> > target/ppc/misc_helper.c | 27 ++++++---------------------
> > target/ppc/timebase_helper.c | 20 +++++++-------------
> > 5 files changed, 28 insertions(+), 44 deletions(-)
> >
> > diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
> > index 9a89083932..8fd6ade471 100644
> > --- a/target/ppc/cpu.h
> > +++ b/target/ppc/cpu.h
> > @@ -1406,6 +1406,13 @@ struct CPUArchState {
> > uint64_t pmu_base_time;
> > };
> >
> > +#define PPC_CPU_HAS_CORE_SIBLINGS(cs) \
> > + (cs->nr_threads > 1)
>
> (cs)->nr_threads
>
> > +
> > +#define PPC_CPU_HAS_LPAR_SIBLINGS(cs) \
> > + ((POWERPC_CPU(cs)->env.flags & POWERPC_FLAG_SMT_1LPAR) && \
> > + PPC_CPU_HAS_CORE_SIBLINGS(cs))
> > +
>
> I tend to prefer static inline when things get complex.
Yeah agree it has become too much.
Thanks,
Nick
