On 8/5/24 15:06, Jiaxun Yang wrote:
Wire up loongson_ipi device for loongson3_virt machine, so we
can have SMP support for TCG backend as well.
Signed-off-by: Jiaxun Yang <jiaxun.y...@flygoat.com>
---
hw/mips/Kconfig | 1 +
hw/mips/loongson3_bootp.c | 2 --
hw/mips/loongson3_bootp.h | 3 +++
hw/mips/loongson3_virt.c | 39 +++++++++++++++++++++++++++++++++++++--
4 files changed, 41 insertions(+), 4 deletions(-)
@@ -534,12 +553,28 @@ static void mips_loongson3_virt_init(MachineState
*machine)
cpu_mips_clock_init(cpu);
qemu_register_reset(main_cpu_reset, cpu);
- if (i >= 4) {
+ if (ipi) {
+ hwaddr base = ((hwaddr)node << 44) + virt_memmap[VIRT_IPI].base;
+ base += core * 0x100;
+ qdev_connect_gpio_out(ipi, i, cpu->env.irq[6]);
+ sysbus_mmio_map(SYS_BUS_DEVICE(ipi), i + 2, base);
+ }
+
+ if (ase_lcsr_available(&MIPS_CPU(cpu)->env)) {
+ MemoryRegion *core_iocsr = g_new(MemoryRegion, 1);
+ g_autofree char *name = g_strdup_printf("loongson3.core%d_iocsr",
i);
+ memory_region_init_alias(core_iocsr, OBJECT(machine), name,
Region owner should be vCPU (core) IMO, not machine. But maybe need
another approach (see my comment on patch #3), although not sure if
easy with KVM.
+ iocsr, 0, UINT32_MAX);
+ memory_region_add_subregion(&MIPS_CPU(cpu)->env.iocsr.mr,
+ 0, core_iocsr);
+ }
+
+ if (node > 0) {
continue; /* Only node-0 can be connected to LIOINTC */
}
for (ip = 0; ip < 4 ; ip++) {
- int pin = i * 4 + ip;
+ int pin = core * LOONGSON3_CORE_PER_NODE + ip;
sysbus_connect_irq(SYS_BUS_DEVICE(liointc),
pin, cpu->env.irq[ip + 2]);
}