The original code assumes that memory transmission is always successful, but in some cases, it gets bus-error.
Add error handling for DMA reading description failures. Do some reasonable settings, and return the corrected transmission size. Finally, return the error status. * Add DMASR_DECERR case * Squash the two commits to one base-commit: 915758c537b5fe09575291f4acd87e2d377a93de [v1] base-commit: 1806da76cb81088ea026ca3441551782b850e393 Fea.Wang (3): hw/dma: Enhance error handling in loading description hw/dma: Add a trace log for a description loading failure hw/net: Fix the transmission return size hw/dma/trace-events | 3 +++ hw/dma/xilinx_axidma.c | 33 +++++++++++++++++++++++++++++---- hw/net/xilinx_axienet.c | 2 +- 3 files changed, 33 insertions(+), 5 deletions(-) -- 2.34.1