On Wed, 5 Jun 2024 at 15:43, Edgar E. Iglesias <edgar.igles...@gmail.com> wrote: > > From: "Edgar E. Iglesias" <edgar.igles...@amd.com> > > Julien reported that he has seen strange behaviour when running > Xen on QEMU using GICv2. When Xen migrates a guest's vCPU to > another pCPU while the vCPU is handling an interrupt the guest > is unable to properly deactivate interrupts. > > It sounds like something rare but in some setups it actually > happens all the time. > > Looking at it a little closer, our GICv2 model treats > deactivation of SPI lines as if they were PPI's, i.e banked per > CPU core. The state for active interrupts should only be banked > for PPI lines, not for SPI lines. > > When deactivating SPI lines, I think we need to handle the state > as unbanked, similar to how we handle writes to GICD_ICACTIVER. > > This fixes the problem on my side.
Applied to target-arm.next, thanks. (I'm surprised anybody's still using GICv2 seriously at this point...) -- PMM
