On Wed, Jun 12, 2024 at 04:14:02PM +0800, Jim Shu wrote: > [EXTERNAL MAIL] > > It is the preparation patch for upcoming RISC-V wgChecker device. > > Since RISC-V wgChecker could permit access in RO/WO permission, the > IOMMUMemoryRegion could return different section for read & write > access. The memory access from CPU should also pass the access_type to > IOMMU translate function so that IOMMU could return the correct section > of specified access_type. >
Hi Jim, Does this method take into account the situation where the CPU access type is different from the access type when creating iotlb? I think the section might be wrong in this situation. Thanks, Ethan > >
