From: Xiong Yining <xiongyining1...@phytium.com.cn>
Enable CPU cluster support on SbsaQemu platform, so that users can
specify a 4-level CPU hierarchy sockets/clusters/cores/threads. And
this topology can be passed to the firmware through /cpus/topology
Device Tree.
Signed-off-by: Xiong Yining <xiongyining1...@phytium.com.cn>
Reviewed-by: Marcin Juszkiewicz <marcin.juszkiew...@linaro.org>
Reviewed-by: Leif Lindholm <quic_llind...@quicinc.com>
Message-id: 20240607103825.1295328-2-xiongyining1...@phytium.com.cn
Tested-by: Marcin Juszkiewicz <marcin.juszkiew...@linaro.org>
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
---
docs/system/arm/sbsa.rst | 4 ++++
hw/arm/sbsa-ref.c | 11 ++++++++++-
2 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/docs/system/arm/sbsa.rst b/docs/system/arm/sbsa.rst
index 2bf22a1d0b0..2bf3fc8d59d 100644
--- a/docs/system/arm/sbsa.rst
+++ b/docs/system/arm/sbsa.rst
@@ -62,6 +62,7 @@ The devicetree reports:
- platform version
- GIC addresses
- NUMA node id for CPUs and memory
+ - CPU topology information
Platform version
''''''''''''''''
@@ -88,3 +89,6 @@ Platform version changes:
0.3
The USB controller is an XHCI device, not EHCI.
+
+0.4
+ CPU topology information is present in devicetree.
diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
index 87884400e30..ae37a923015 100644
--- a/hw/arm/sbsa-ref.c
+++ b/hw/arm/sbsa-ref.c
@@ -219,7 +219,7 @@ static void create_fdt(SBSAMachineState *sms)
* fw compatibility.
*/
qemu_fdt_setprop_cell(fdt, "/", "machine-version-major", 0);
- qemu_fdt_setprop_cell(fdt, "/", "machine-version-minor", 3);
+ qemu_fdt_setprop_cell(fdt, "/", "machine-version-minor", 4);
if (ms->numa_state->have_numa_distance) {
int size = nb_numa_nodes * nb_numa_nodes * 3 * sizeof(uint32_t);
@@ -276,6 +276,14 @@ static void create_fdt(SBSAMachineState *sms)
g_free(nodename);
}
+ /* Add CPU topology description through fdt node topology. */
+ qemu_fdt_add_subnode(sms->fdt, "/cpus/topology");
+
+ qemu_fdt_setprop_cell(sms->fdt, "/cpus/topology", "sockets",
ms->smp.sockets);
+ qemu_fdt_setprop_cell(sms->fdt, "/cpus/topology", "clusters",
ms->smp.clusters);
+ qemu_fdt_setprop_cell(sms->fdt, "/cpus/topology", "cores", ms->smp.cores);
+ qemu_fdt_setprop_cell(sms->fdt, "/cpus/topology", "threads",
ms->smp.threads);
+
sbsa_fdt_add_gic_node(sms);
}
@@ -898,6 +906,7 @@ static void sbsa_ref_class_init(ObjectClass *oc, void *data)
mc->default_ram_size = 1 * GiB;
mc->default_ram_id = "sbsa-ref.ram";
mc->default_cpus = 4;
+ mc->smp_props.clusters_supported = true;
mc->possible_cpu_arch_ids = sbsa_ref_possible_cpu_arch_ids;
mc->cpu_index_to_instance_props = sbsa_ref_cpu_index_to_props;
mc->get_default_cpu_node_id = sbsa_ref_get_default_cpu_node_id;
--
2.34.1
