On Mon May 27, 2024 at 9:13 AM AEST, BALATON Zoltan wrote:
> The ppc_hash64_hpt_base() and ppc_hash64_hpt_mask() functions are
> mostly used by mmu-hash64.c only but there is one call to
> ppc_hash64_hpt_mask() in hw/ppc/spapr_vhyp_mmu.c.in a helper function
> that can be moved to mmu-hash64.c which allows these functions to be
> removed from the header.
>
Fine. Probably too big to inline anyway.
Reviewed-by: Nicholas Piggin <npig...@gmail.com>
> Signed-off-by: BALATON Zoltan <bala...@eik.bme.hu>
> ---
> hw/ppc/spapr_vhyp_mmu.c | 21 ++++------------
> target/ppc/mmu-book3s-v3.h | 40 -------------------------------
> target/ppc/mmu-hash64.c | 49 ++++++++++++++++++++++++++++++++++++++
> target/ppc/mmu-hash64.h | 1 +
> 4 files changed, 54 insertions(+), 57 deletions(-)
>
> diff --git a/hw/ppc/spapr_vhyp_mmu.c b/hw/ppc/spapr_vhyp_mmu.c
> index b3dd8b3a59..2d41d7f77b 100644
> --- a/hw/ppc/spapr_vhyp_mmu.c
> +++ b/hw/ppc/spapr_vhyp_mmu.c
> @@ -15,19 +15,6 @@
> #include "helper_regs.h"
> #include "hw/ppc/spapr.h"
> #include "mmu-hash64.h"
> -#include "mmu-book3s-v3.h"
> -
> -
> -static inline bool valid_ptex(PowerPCCPU *cpu, target_ulong ptex)
> -{
> - /*
> - * hash value/pteg group index is normalized by HPT mask
> - */
> - if (((ptex & ~7ULL) / HPTES_PER_GROUP) & ~ppc_hash64_hpt_mask(cpu)) {
> - return false;
> - }
> - return true;
> -}
>
> static target_ulong h_enter(PowerPCCPU *cpu, SpaprMachineState *spapr,
> target_ulong opcode, target_ulong *args)
> @@ -70,7 +57,7 @@ static target_ulong h_enter(PowerPCCPU *cpu,
> SpaprMachineState *spapr,
>
> pteh &= ~0x60ULL;
>
> - if (!valid_ptex(cpu, ptex)) {
> + if (!ppc_hash64_valid_ptex(cpu, ptex)) {
> return H_PARAMETER;
> }
>
> @@ -119,7 +106,7 @@ static RemoveResult remove_hpte(PowerPCCPU *cpu
> const ppc_hash_pte64_t *hptes;
> target_ulong v, r;
>
> - if (!valid_ptex(cpu, ptex)) {
> + if (!ppc_hash64_valid_ptex(cpu, ptex)) {
> return REMOVE_PARM;
> }
>
> @@ -250,7 +237,7 @@ static target_ulong h_protect(PowerPCCPU *cpu,
> SpaprMachineState *spapr,
> const ppc_hash_pte64_t *hptes;
> target_ulong v, r;
>
> - if (!valid_ptex(cpu, ptex)) {
> + if (!ppc_hash64_valid_ptex(cpu, ptex)) {
> return H_PARAMETER;
> }
>
> @@ -287,7 +274,7 @@ static target_ulong h_read(PowerPCCPU *cpu,
> SpaprMachineState *spapr,
> int i, ridx, n_entries = 1;
> const ppc_hash_pte64_t *hptes;
>
> - if (!valid_ptex(cpu, ptex)) {
> + if (!ppc_hash64_valid_ptex(cpu, ptex)) {
> return H_PARAMETER;
> }
>
> diff --git a/target/ppc/mmu-book3s-v3.h b/target/ppc/mmu-book3s-v3.h
> index f3f7993958..263ce55c1f 100644
> --- a/target/ppc/mmu-book3s-v3.h
> +++ b/target/ppc/mmu-book3s-v3.h
> @@ -83,46 +83,6 @@ static inline bool ppc64_v3_radix(PowerPCCPU *cpu)
> return !!(cpu->env.spr[SPR_LPCR] & LPCR_HR);
> }
>
> -static inline hwaddr ppc_hash64_hpt_base(PowerPCCPU *cpu)
> -{
> - uint64_t base;
> -
> - if (cpu->vhyp) {
> - return 0;
> - }
> - if (cpu->env.mmu_model == POWERPC_MMU_3_00) {
> - ppc_v3_pate_t pate;
> -
> - if (!ppc64_v3_get_pate(cpu, cpu->env.spr[SPR_LPIDR], &pate)) {
> - return 0;
> - }
> - base = pate.dw0;
> - } else {
> - base = cpu->env.spr[SPR_SDR1];
> - }
> - return base & SDR_64_HTABORG;
> -}
> -
> -static inline hwaddr ppc_hash64_hpt_mask(PowerPCCPU *cpu)
> -{
> - uint64_t base;
> -
> - if (cpu->vhyp) {
> - return cpu->vhyp_class->hpt_mask(cpu->vhyp);
> - }
> - if (cpu->env.mmu_model == POWERPC_MMU_3_00) {
> - ppc_v3_pate_t pate;
> -
> - if (!ppc64_v3_get_pate(cpu, cpu->env.spr[SPR_LPIDR], &pate)) {
> - return 0;
> - }
> - base = pate.dw0;
> - } else {
> - base = cpu->env.spr[SPR_SDR1];
> - }
> - return (1ULL << ((base & SDR_64_HTABSIZE) + 18 - 7)) - 1;
> -}
> -
> #endif /* TARGET_PPC64 */
>
> #endif /* CONFIG_USER_ONLY */
> diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c
> index cbc8efa0c3..7bc0323f26 100644
> --- a/target/ppc/mmu-hash64.c
> +++ b/target/ppc/mmu-hash64.c
> @@ -508,6 +508,46 @@ static int ppc_hash64_amr_prot(PowerPCCPU *cpu,
> ppc_hash_pte64_t pte)
> return prot;
> }
>
> +static hwaddr ppc_hash64_hpt_base(PowerPCCPU *cpu)
> +{
> + uint64_t base;
> +
> + if (cpu->vhyp) {
> + return 0;
> + }
> + if (cpu->env.mmu_model == POWERPC_MMU_3_00) {
> + ppc_v3_pate_t pate;
> +
> + if (!ppc64_v3_get_pate(cpu, cpu->env.spr[SPR_LPIDR], &pate)) {
> + return 0;
> + }
> + base = pate.dw0;
> + } else {
> + base = cpu->env.spr[SPR_SDR1];
> + }
> + return base & SDR_64_HTABORG;
> +}
> +
> +static hwaddr ppc_hash64_hpt_mask(PowerPCCPU *cpu)
> +{
> + uint64_t base;
> +
> + if (cpu->vhyp) {
> + return cpu->vhyp_class->hpt_mask(cpu->vhyp);
> + }
> + if (cpu->env.mmu_model == POWERPC_MMU_3_00) {
> + ppc_v3_pate_t pate;
> +
> + if (!ppc64_v3_get_pate(cpu, cpu->env.spr[SPR_LPIDR], &pate)) {
> + return 0;
> + }
> + base = pate.dw0;
> + } else {
> + base = cpu->env.spr[SPR_SDR1];
> + }
> + return (1ULL << ((base & SDR_64_HTABSIZE) + 18 - 7)) - 1;
> +}
> +
> const ppc_hash_pte64_t *ppc_hash64_map_hptes(PowerPCCPU *cpu,
> hwaddr ptex, int n)
> {
> @@ -545,6 +585,15 @@ void ppc_hash64_unmap_hptes(PowerPCCPU *cpu, const
> ppc_hash_pte64_t *hptes,
> false, n * HASH_PTE_SIZE_64);
> }
>
> +bool ppc_hash64_valid_ptex(PowerPCCPU *cpu, target_ulong ptex)
> +{
> + /* hash value/pteg group index is normalized by HPT mask */
> + if (((ptex & ~7ULL) / HPTES_PER_GROUP) & ~ppc_hash64_hpt_mask(cpu)) {
> + return false;
> + }
> + return true;
> +}
> +
> static unsigned hpte_page_shift(const PPCHash64SegmentPageSizes *sps,
> uint64_t pte0, uint64_t pte1)
> {
> diff --git a/target/ppc/mmu-hash64.h b/target/ppc/mmu-hash64.h
> index de653fcae5..ae8d4b37ae 100644
> --- a/target/ppc/mmu-hash64.h
> +++ b/target/ppc/mmu-hash64.h
> @@ -120,6 +120,7 @@ const ppc_hash_pte64_t *ppc_hash64_map_hptes(PowerPCCPU
> *cpu,
> hwaddr ptex, int n);
> void ppc_hash64_unmap_hptes(PowerPCCPU *cpu, const ppc_hash_pte64_t *hptes,
> hwaddr ptex, int n);
> +bool ppc_hash64_valid_ptex(PowerPCCPU *cpu, target_ulong ptex);
>
> static inline uint64_t ppc_hash64_hpte0(PowerPCCPU *cpu,
> const ppc_hash_pte64_t *hptes, int i)
