________________________________ From: Michael S. Tsirkin <m...@redhat.com> Sent: 04 July 2024 08:24 To: CLEMENT MATHIEU--DRIF <clement.mathieu--d...@eviden.com> Cc: qemu-devel@nongnu.org <qemu-devel@nongnu.org>; jasow...@redhat.com <jasow...@redhat.com>; zhenzhong.d...@intel.com <zhenzhong.d...@intel.com>; kevin.t...@intel.com <kevin.t...@intel.com>; yi.l....@intel.com <yi.l....@intel.com>; joao.m.mart...@oracle.com <joao.m.mart...@oracle.com>; pet...@redhat.com <pet...@redhat.com> Subject: Re: [PATCH v1 0/8] PRI support for VT-d
Caution: External email. Do not open attachments or click links, unless this email comes from a known sender and you know the content is safe. On Thu, May 30, 2024 at 12:24:58PM +0000, CLEMENT MATHIEU--DRIF wrote: > This series belongs to a list of series that add SVM support for VT-d. > > Here we focus on the implementation of PRI support in the IOMMU and on a > PCI-level > API for PRI to be used by virtual devices. > > This work is based on the VT-d specification version 4.1 (March 2023). > Here is a link to a GitHub repository where you can find the following > elements : > - Qemu with all the patches for SVM > - ATS > - PRI > - Device IOTLB invalidations > - Requests with already translated addresses > - A demo device > - A simple driver for the demo device > - A userspace program (for testing and demonstration purposes) > > https://eur06.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub.com%2FBullSequana%2FQemu-in-guest-SVM-demo&data=05%7C02%7Cclement.mathieu--drif%40eviden.com%7C0b2efce63b3b400a2a9408dc9bf1f45c%7C7d1c77852d8a437db8421ed5d8fbe00a%7C0%7C0%7C638556710682005347%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7C%7C&sdata=QzUQdYTeIxZ0poSL0MvM2x%2F8ar4R%2B7YioDTO3WQeFAU%3D&reserved=0<https://github.com/BullSequana/Qemu-in-guest-SVM-demo> To make things clear, is this patchset independent or does it have a dependency, too? Hi Michael, This also depends on the ATS series (which also has dependencies itself). I will make this very clear in future versions. > Clément Mathieu--Drif (8): > pcie: add a helper to declare the PRI capability for a pcie device > pcie: helper functions to check to check if PRI is enabled > pcie: add a way to get the outstanding page request allocation (pri) > from the config space. > pci: declare structures and IOMMU operation for PRI > pci: add a PCI-level API for PRI > intel_iommu: declare PRI constants and structures > intel_iommu: declare registers for PRI > intel_iommu: add PRI operations support > > hw/i386/intel_iommu.c | 302 +++++++++++++++++++++++++++++++++ > hw/i386/intel_iommu_internal.h | 54 +++++- > hw/pci/pci.c | 37 ++++ > hw/pci/pcie.c | 42 +++++ > include/exec/memory.h | 65 +++++++ > include/hw/pci/pci.h | 45 +++++ > include/hw/pci/pci_bus.h | 1 + > include/hw/pci/pcie.h | 7 +- > include/hw/pci/pcie_regs.h | 4 + > system/memory.c | 49 ++++++ > 10 files changed, 604 insertions(+), 2 deletions(-) > > -- > 2.45.1
