On Mon, 8 Jul 2024 17:17:33 +0530 Sunil V L <suni...@ventanamicro.com> wrote:
> PLIC and APLIC should be in namespace as well. So, add them using the > defined HID. > > Signed-off-by: Sunil V L <suni...@ventanamicro.com> > Acked-by: Alistair Francis <alistair.fran...@wdc.com> > --- > hw/riscv/virt-acpi-build.c | 47 ++++++++++++++++++++++++++++++++++++++ > 1 file changed, 47 insertions(+) > > diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c > index 0925528160..87fe882af0 100644 > --- a/hw/riscv/virt-acpi-build.c > +++ b/hw/riscv/virt-acpi-build.c > @@ -141,6 +141,52 @@ static void acpi_dsdt_add_cpus(Aml *scope, > RISCVVirtState *s) > } > } > > +static void acpi_dsdt_add_plic_aplic(Aml *scope, RISCVVirtState *s) > +{ > + MachineState *ms = MACHINE(s); > + uint64_t plic_aplic_addr; > + uint32_t gsi_base; > + uint8_t socket; > + > + if (s->aia_type == VIRT_AIA_TYPE_NONE) { > + /* PLICs */ > + for (socket = 0; socket < riscv_socket_count(ms); socket++) { you have socket_count in caller already, pass it as argument and drop MachineState *ms = MACHINE(s) above. > + plic_aplic_addr = s->memmap[VIRT_PLIC].base + > + s->memmap[VIRT_PLIC].size * socket; > + gsi_base = VIRT_IRQCHIP_NUM_SOURCES * socket; > + Aml *dev = aml_device("IC%.02X", socket); > + aml_append(dev, aml_name_decl("_HID", aml_string("RSCV0001"))); > + aml_append(dev, aml_name_decl("_UID", aml_int(socket))); > + aml_append(dev, aml_name_decl("_GSB", aml_int(gsi_base))); > + > + Aml *crs = aml_resource_template(); > + aml_append(crs, aml_memory32_fixed(plic_aplic_addr, > + s->memmap[VIRT_PLIC].size, > + AML_READ_WRITE)); > + aml_append(dev, aml_name_decl("_CRS", crs)); > + aml_append(scope, dev); > + } > + } else { > + /* APLICs */ > + for (socket = 0; socket < riscv_socket_count(ms); socket++) { > + plic_aplic_addr = s->memmap[VIRT_APLIC_S].base + > + s->memmap[VIRT_APLIC_S].size * socket; > + gsi_base = VIRT_IRQCHIP_NUM_SOURCES * socket; > + Aml *dev = aml_device("IC%.02X", socket); > + aml_append(dev, aml_name_decl("_HID", aml_string("RSCV0002"))); > + aml_append(dev, aml_name_decl("_UID", aml_int(socket))); > + aml_append(dev, aml_name_decl("_GSB", aml_int(gsi_base))); > + > + Aml *crs = aml_resource_template(); > + aml_append(crs, aml_memory32_fixed(plic_aplic_addr, > + s->memmap[VIRT_APLIC_S].size, > + AML_READ_WRITE)); > + aml_append(dev, aml_name_decl("_CRS", crs)); > + aml_append(scope, dev); > + } > + } > +} > + > static void > acpi_dsdt_add_uart(Aml *scope, const MemMapEntry *uart_memmap, > uint32_t uart_irq) > @@ -411,6 +457,7 @@ static void build_dsdt(GArray *table_data, > > socket_count = riscv_socket_count(ms); > > + acpi_dsdt_add_plic_aplic(scope, s); Perhaps do the same for memmap/RISCVVirtState vvvv > acpi_dsdt_add_uart(scope, &memmap[VIRT_UART0], UART0_IRQ); > > if (socket_count == 1) {