On 8/2/24 18:34, Ajeet Singh wrote:
From: Mark Corbin<mark.cor...@embecsom.com>
Added definitions for RISC-V register structures, including
general-purpose registers and floating-point registers, in
'target_arch_reg.h'. Implemented the 'target_copy_regs' function to
copy register values from the CPU state to the target register
structure, ensuring proper endianness handling using 'tswapreg'.
Signed-off-by: Mark Corbin<mark.cor...@embecsom.com>
Signed-off-by: Ajeet Singh<itac...@freebsd.org>
---
bsd-user/riscv/target_arch_reg.h | 88 ++++++++++++++++++++++++++++++++
1 file changed, 88 insertions(+)
create mode 100644 bsd-user/riscv/target_arch_reg.h
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
r~
