On Sat, 31 Aug 2024 19:25:47 +0800
Zhao Liu <zhao1....@intel.com> wrote:
> Hi Alireza,
>
> Great to see your Arm side implementation!
>
> On Fri, Aug 23, 2024 at 01:54:44PM +0100, Alireza Sanaee wrote:
> > Date: Fri, 23 Aug 2024 13:54:44 +0100
> > From: Alireza Sanaee <alireza.san...@huawei.com>
> > Subject: [RFC PATCH 0/2] Specifying cache topology on ARM
> > X-Mailer: git-send-email 2.34.1
> >
>
> [snip]
>
> >
> > The following command will represent the system.
> >
> > ./qemu-system-aarch64 \
> > -machine virt,**smp-cache=cache0** \
> > -cpu max \
> > -m 2048 \
> > -smp sockets=2,clusters=1,cores=2,threads=2 \
> > -kernel ./Image.gz \
> > -append "console=ttyAMA0 root=/dev/ram rdinit=/init acpi=force" \
> > -initrd rootfs.cpio.gz \
> > -bios ./edk2-aarch64-code.fd \
> > **-object
> > '{"qom-type":"smp-cache","id":"cache0","caches":[{"name":"l1d","topo":"core"},{"name":"l1i","topo":"core"},{"name":"l2","topo":"cluster"},{"name":"l3","topo":"socket"}]}'**
> > \ -nographic
>
> I plan to refresh a new version soon, in which the smp-cache array
> will be integrated into -machine totally. And I'cc you then.
>
> Regards,
> Zhao
>
>
Hi Zhao,
Yes, please keep me CCed.
One thing that I noticed, sometimes, since you were going down the
Intel path, some variables couldn't be NULL. But when I was gonna go
down to ARM path, I faced some scenarios where I ended up with
some uninit vars which is still OK but could have been avoided.
Looking forward to the next revision.
Alireza
