On Tue, 29 Oct 2024 at 14:05, Paolo Bonzini <[email protected]> wrote: > > QEMU does not show availability of MPX in CPUID when running under > Hypervisor.framework. Therefore, in the unlikely chance that the host > has MPX enabled, hide those bits from leaf 0xD as well.
To clarify: is there some kind of issue with MPX in Qemu in general? Or is this a consistency effort - normal Macs don't expose this feature, so we have no idea if it were to work if someone did manage to hack up some frankensteinian host system that somehow does have those bits set? > Signed-off-by: Paolo Bonzini <[email protected]> > --- > target/i386/hvf/x86_cpuid.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/target/i386/hvf/x86_cpuid.c b/target/i386/hvf/x86_cpuid.c > index e56cd8411ba..4b184767f4a 100644 > --- a/target/i386/hvf/x86_cpuid.c > +++ b/target/i386/hvf/x86_cpuid.c > @@ -110,9 +110,9 @@ uint32_t hvf_get_supported_cpuid(uint32_t func, uint32_t > idx, > if (idx == 0) { > uint64_t host_xcr0; > if (xgetbv(ecx, 0, &host_xcr0)) { > + /* Only show xcr0 bits corresponding to usable features. */ > uint64_t supp_xcr0 = host_xcr0 & (XSTATE_FP_MASK | > XSTATE_SSE_MASK | XSTATE_YMM_MASK | > - XSTATE_BNDREGS_MASK | XSTATE_BNDCSR_MASK | > XSTATE_OPMASK_MASK | XSTATE_ZMM_Hi256_MASK > | > XSTATE_Hi16_ZMM_MASK); > eax &= supp_xcr0; > -- > 2.47.0 > >
