On 11/1/24 10:08, Pierrick Bouvier wrote:
Introduced in 0c54ac, "hw/riscv: add RISC-V IOMMU base emulation"../hw/riscv/riscv-iommu.c:187:17: error: redefinition of '_pext_u64' 187 | static uint64_t _pext_u64(uint64_t val, uint64_t ext) | ^ D:/a/_temp/msys64/clang64/lib/clang/18/include/bmi2intrin.h:217:1: note: previous definition is here 217 | _pext_u64(unsigned long long __X, unsigned long long __Y) | ^ Signed-off-by: Pierrick Bouvier <[email protected]> --- hw/riscv/riscv-iommu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/riscv/riscv-iommu.c b/hw/riscv/riscv-iommu.c index feb650549ac..f738570bac2 100644 --- a/hw/riscv/riscv-iommu.c +++ b/hw/riscv/riscv-iommu.c @@ -184,7 +184,7 @@ static void riscv_iommu_pri(RISCVIOMMUState *s, }/* Portable implementation of pext_u64, bit-mask extraction. */-static uint64_t _pext_u64(uint64_t val, uint64_t ext) +static uint64_t pext_u64(uint64_t val, uint64_t ext) { uint64_t ret = 0; uint64_t rot = 1; @@ -528,7 +528,7 @@ static MemTxResult riscv_iommu_msi_write(RISCVIOMMUState *s, int cause;/* Interrupt File Number */- intn = _pext_u64(PPN_DOWN(gpa), ctx->msi_addr_mask); + intn = pext_u64(PPN_DOWN(gpa), ctx->msi_addr_mask); if (intn >= 256) { /* Interrupt file number out of range */ res = MEMTX_ACCESS_ERROR;
Sent v2 with changes asked in this thread.
