From: TANG Tiancheng <[email protected]> Ensure that riscv_cpu_sxl returns MXL_RV32 when runningRV32 in an RV64 QEMU.
Signed-off-by: TANG Tiancheng <[email protected]> Fixes: 05e6ca5e156 ("target/riscv: Ignore reserved bits in PTE for RV64") Reviewed-by: Liu Zhiwei <[email protected]> Reviewed-by: Alistair Francis <[email protected]> Message-ID: <[email protected]> Signed-off-by: Alistair Francis <[email protected]> (cherry picked from commit 929e4277c128772bad41cc795995f754cb9991af) Signed-off-by: Michael Tokarev <[email protected]> diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 3a9e25053f..039f25dc6e 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -675,8 +675,11 @@ static inline RISCVMXL riscv_cpu_sxl(CPURISCVState *env) #ifdef CONFIG_USER_ONLY return env->misa_mxl; #else - return get_field(env->mstatus, MSTATUS64_SXL); + if (env->misa_mxl != MXL_RV32) { + return get_field(env->mstatus, MSTATUS64_SXL); + } #endif + return MXL_RV32; } #endif -- 2.39.5
