Changes since v4: - Split into a seperate submission to simplify review - Use load/store atomic functions as suggested by Richard Henderson - Do 8, 4, 2 byte atomic ldst for sizes smaller than 16 bytes
This patch now uses the atomic ldst functions from accel/tcg/ldst_atomicity.c.inc to ensure element size atomicity. I was not sure of the best way to make these functions accessible from the riscv target, so any suggestions are very welcome. Previous versions: - v1: https://lore.kernel.org/all/[email protected]/ - v2: https://lore.kernel.org/all/[email protected]/ - v3: https://lore.kernel.org/all/[email protected]/ - v4: https://lore.kernel.org/all/[email protected]/ Cc: Richard Henderson <[email protected]> Cc: Palmer Dabbelt <[email protected]> Cc: Alistair Francis <[email protected]> Cc: Bin Meng <[email protected]> Cc: Weiwei Li <[email protected]> Cc: Daniel Henrique Barboza <[email protected]> Cc: Liu Zhiwei <[email protected]> Cc: Helene Chelin <[email protected]> Cc: Nathan Egge <[email protected]> Cc: Max Chou <[email protected]> Craig Blackmore (1): target/riscv: rvv: Use wider accesses for unit stride load/store target/riscv/trace-events | 12 +++++ target/riscv/vector_helper.c | 95 +++++++++++++++++++++++++++++++++--- 2 files changed, 101 insertions(+), 6 deletions(-) -- 2.43.0
