Following the reviews on the previous version: - RFC v1: https://lore.kernel.org/all/[email protected]/ - Review: https://lore.kernel.org/all/[email protected]/
we apply the following fixes: - Fall back to using the helper function if vstart != 0 at the beginning of the iterations and refactor the setting of the function arguments accordignly. - Add mark_vs_dirty before performing the memory operations. - Loosen the atomicity constraints and apply only MO_ATOM_IFALIGN_PAIR for element sizes MO_16, MO_32 and MO_64. - Change the way we update vstart in order to set vstart to 0 if it's the last iteration. - Fix the indentation. We also rephrase the commit message to better reflect the new behaviour of the patch. Many thanks Richard for the thorough review and explanations. Cc: Richard Handerson <[email protected]> Cc: Palmer Dabbelt <[email protected]> Cc: Alistair Francis <[email protected]> Cc: Bin Meng <[email protected]> Cc: Weiwei Li <[email protected]> Cc: Daniel Henrique Barboza <[email protected]> Cc: Liu Zhiwei <[email protected]> Cc: Helene Chelin <[email protected]> Cc: Nathan Egge <[email protected]> Cc: Max Chou <[email protected]> Cc: Jeremy Bennett <[email protected]> Cc: Craig Blackmore <[email protected]> Paolo Savini (1): target/riscv: use tcg ops generation to emulate whole reg rvv loads/stores. target/riscv/insn_trans/trans_rvv.c.inc | 125 +++++++++++++++--------- 1 file changed, 78 insertions(+), 47 deletions(-) -- 2.34.1
