Hey Alistair, While doing a non regression with default bios (OpenSBI 1.5) and max cpu, Atish found that this breaks boot with OpenSBI 1.5 since it does not have support for double trap clearing. On Henrique guidance, I resent this patch alone with an associated fix. :
https://lore.kernel.org/qemu-riscv/[email protected]/T/#t Sorry for the trouble, thanks, Clément On 17/01/2025 06:55, Alistair Francis wrote: > From: Clément Léger <[email protected]> > > Add the switch to enable the Smdbltrp ISA extension. > > Signed-off-by: Clément Léger <[email protected]> > Reviewed-by: Alistair Francis <[email protected]> > Message-ID: <[email protected]> > Signed-off-by: Alistair Francis <[email protected]> > --- > target/riscv/cpu.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c > index e3ed11b0fd..bddf1ba75e 100644 > --- a/target/riscv/cpu.c > +++ b/target/riscv/cpu.c > @@ -194,6 +194,7 @@ const RISCVIsaExtData isa_edata_arr[] = { > ISA_EXT_DATA_ENTRY(smcdeleg, PRIV_VERSION_1_13_0, ext_smcdeleg), > ISA_EXT_DATA_ENTRY(smcntrpmf, PRIV_VERSION_1_12_0, ext_smcntrpmf), > ISA_EXT_DATA_ENTRY(smcsrind, PRIV_VERSION_1_13_0, ext_smcsrind), > + ISA_EXT_DATA_ENTRY(smdbltrp, PRIV_VERSION_1_13_0, ext_smdbltrp), > ISA_EXT_DATA_ENTRY(smepmp, PRIV_VERSION_1_12_0, ext_smepmp), > ISA_EXT_DATA_ENTRY(smrnmi, PRIV_VERSION_1_12_0, ext_smrnmi), > ISA_EXT_DATA_ENTRY(smmpm, PRIV_VERSION_1_13_0, ext_smmpm), > @@ -1626,6 +1627,7 @@ const RISCVCPUMultiExtConfig riscv_cpu_extensions[] = { > MULTI_EXT_CFG_BOOL("ssnpm", ext_ssnpm, false), > > MULTI_EXT_CFG_BOOL("smaia", ext_smaia, false), > + MULTI_EXT_CFG_BOOL("smdbltrp", ext_smdbltrp, false), > MULTI_EXT_CFG_BOOL("smepmp", ext_smepmp, false), > MULTI_EXT_CFG_BOOL("smrnmi", ext_smrnmi, false), > MULTI_EXT_CFG_BOOL("smmpm", ext_smmpm, false),
