This patchset is derived from patchset provided by Peter Maydell <peter.mayd...@linaro.org>: http://lists.gnu.org/archive/html/qemu-devel/2011-11/msg01870.html Also this patchset includes some fixes for bugs spotted by Ying-Shiuan Pan <ys...@itri.org.tw>. Still isue pointed by Peter presents here I think: * extra vring alignment field not saved/restored (because virtio layer isn't using VMState and doesn't allow the virtio base layer to specify a version for its data so back-compat would be tricky) I've tested blk and net parts. Work good to me.
In this patchset refactoring of virtio-mmio layer is made. Instead of creating virtio-blk-mmio, virtio-net-mmio, etc on the system bus we create virtio-blk, virtio-net, etc devices on the virtio-transport bus. To create virtio-transport bus virtio-mmio-transport device provided. Transport device plugs into virtio-mmio bus. To create virtio-mmio bus virtio-mmio-bridge device provided. Bridge device is borrowed from s390 platform and plugs into system bus. So, we have: system bus----> |MMIO Bridge|----virtio-mmio bus---->----> |MMIO Transport|----virtio-transport-bus(name:virtio-mmio.0)----> |Virtio Backend (blk, net, etc)| | |---> |MMIO Transport|----virtio-transport-bus(name:virtio-mmio.1)----> |Virtio Backend (blk, net, etc)| The interface to platforms consists of: - create a virtio bus (at this time virtio-mmio only) - create a transport device (at this time virtio-mmio only) Then from command line user can plug back-end (virtio-blk, net, etc) into desired bus (at this time virtio-mmio.x only). The next step of refactoring will touch virtio-pci layer. There PCI Transport device will be created which provides the same transport bus as MMIO transport device. I guess that it will look like: pci bus----> |PCI Bridge|----virtio-pci bus---->----> |PCI Transport|----virtio-transport-bus(name:virtio-pci.0)----> |Virtio Backend (blk, net, etc)| | |---> |PCI Transport|----virtio-transport-bus(name:virtio-pci.1)----> |Virtio Backend (blk, net, etc)| Also, there should be some back compatibility to keep pci backends able to be plugged into "virtio" bus as it done now (if I'm not wrong) and to not break present command lines. Evgeny Voevodin (6): Virtio: Add transport bindings. hw/virtio-serial-bus.c: Add virtio-serial device. hw/virtio-balloon.c: Add virtio-balloon device. hw/virtio-net.c: Add virtio-net device. hw/virtio-blk.c: Add virtio-blk device. hw/exynos4210.c: Create two virtio-mmio transport instances. Peter Maydell (3): virtio: Add support for guest setting of queue size virtio: Support transports which can specify the vring alignment Add MMIO based virtio transport Makefile.objs | 2 + hw/exynos4210.c | 12 ++ hw/virtio-balloon.c | 34 ++++ hw/virtio-balloon.h | 7 + hw/virtio-blk.c | 42 +++++ hw/virtio-blk.h | 11 + hw/virtio-mmio.c | 480 ++++++++++++++++++++++++++++++++++++++++++++++++ hw/virtio-mmio.h | 31 +++ hw/virtio-net.c | 46 +++++ hw/virtio-net.h | 11 + hw/virtio-serial-bus.c | 42 +++++ hw/virtio-serial.h | 9 + hw/virtio-transport.c | 46 +++++ hw/virtio-transport.h | 39 ++++ hw/virtio.c | 20 ++- hw/virtio.h | 2 + 16 files changed, 832 insertions(+), 2 deletions(-) create mode 100644 hw/virtio-mmio.c create mode 100644 hw/virtio-mmio.h create mode 100644 hw/virtio-transport.c create mode 100644 hw/virtio-transport.h -- 1.7.5.4