Re: [PATCH v5 6/6] target/i386: Add support for EPYC-Turin model

[Moger, Babu]

Hi Zhao,

On 2/20/2025 6:11 AM, Zhao Liu wrote:

+static const CPUCaches epyc_turin_cache_info = {
+    .l1d_cache = &(CPUCacheInfo) {
+        .type = DATA_CACHE,
+        .level = 1,
+        .size = 48 * KiB,
+        .line_size = 64,
+        .associativity = 12,
+        .partitions = 1,
+        .sets = 64,
+        .lines_per_tag = 1,
+        .self_init = 1,

true.

Sure.

+        .share_level = CPU_TOPOLOGY_LEVEL_CORE,
+    },
+    .l1i_cache = &(CPUCacheInfo) {
+        .type = INSTRUCTION_CACHE,
+        .level = 1,
+        .size = 32 * KiB,
+        .line_size = 64,
+        .associativity = 8,
+        .partitions = 1,
+        .sets = 64,
+        .lines_per_tag = 1,
+        .self_init = 1,

true.

Sure.

Reviewed-by: Zhao Liu <zhao1....@intel.com>

thanks

(And it would be better to add a Turin entry in 
docs/system/cpu-models-x86.rst.inc
later :-).)

Yes. Will add a new patch to update docs/system/cpu-models-x86.rst.inc.

Thanks,
Zhao