在2025年2月25日二月 上午8:50,bibo mao写道:
> On 2025/2/25 上午8:40, Jiaxun Yang wrote:
>> Hi all,
>>
>> This series is a collection of small fixes I made to TCG for
>> LoongArch32.
>>
>> There are still many thing broken, especially on CSRs. More
>> series following. However this is sufficient to boot 32bit
>> kernel.
> Is there any product introduction about LoongArch32 board? such as MMU
> type, memory type(DDR or SRAM), interrupt controller type.
Sure, for LoongArch32 the most accessible board at the moment is chiplap FPGA
[1].
There are also some ASIC designs (BaiXing Project) based on chiplab.
Long in short:
- MMU: PG style
- Mmeory: DDR
- Interrupt controller: custom (Loongson-1C like) connected to CPU's
int pin.
Thanks
[1]: https://gitee.com/loongson-edu/chiplab
>
> Regards
> Bibo Mao
>>
--
- Jiaxun
- [PATCH v2 4/9] target/loongarch: Perform sign exte... Jiaxun Yang
- [PATCH v2 5/9] target/loongarch: Use target_ulong ... Jiaxun Yang
- [PATCH v2 3/9] target/loongarch: Fix PGD CSR for L... Jiaxun Yang
- Re: [PATCH v2 3/9] target/loongarch: Fix PGD ... Philippe Mathieu-Daudé
- [PATCH v2 7/9] target/loongarch: Use target_ulong ... Jiaxun Yang
- [PATCH v2 8/9] target/loongarch: Fix load type for... Jiaxun Yang
- [PATCH v2 9/9] target/loongarch: Introduce max32 C... Jiaxun Yang
- [PATCH v2 1/9] target/loongarch: Enable rotr.w/rot... Jiaxun Yang
- [PATCH v2 2/9] target/loongarch: Fix address gener... Jiaxun Yang
- Re: [PATCH v2 0/9] target/loongarch: LoongArch32 f... bibo mao
- Re: [PATCH v2 0/9] target/loongarch: LoongArc... Jiaxun Yang
- Re: [PATCH v2 0/9] target/loongarch: Loon... bibo mao
- Re: [PATCH v2 0/9] target/loongarch: ... Jiaxun Yang
- Re: [PATCH v2 0/9] target/loongar... bibo mao
- Re: [PATCH v2 0/9] target/lo... Jiaxun Yang
