RE: [PATCH 19/38] target/hexagon: Define register fields for system regs

[ltaylorsimpson]

> -----Original Message-----
> From: Brian Cain <brian.c...@oss.qualcomm.com>
> Sent: Friday, February 28, 2025 11:26 PM
> To: qemu-devel@nongnu.org
> Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org;
> phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng;
> quic_mlie...@quicinc.com; ltaylorsimp...@gmail.com;
> alex.ben...@linaro.org; quic_mbur...@quicinc.com;
> sidn...@quicinc.com; Brian Cain <bc...@quicinc.com>
> Subject: [PATCH 19/38] target/hexagon: Define register fields for system
> regs
> 
> From: Brian Cain <bc...@quicinc.com>
> 
> Define the register fields for ssr, schedcfg, stid, bestwait, ccr, modectl, 
> imask,
> ipendad.
> 
> Define the fields for TLB entries.
> 
> Signed-off-by: Brian Cain <brian.c...@oss.qualcomm.com>

Reviewed-by: Taylor Simpson <ltaylorsimp...@gmail.com>