On Tue, 11 Mar 2025, Cornelia Huck wrote:
+++ b/target/arm/cpu.h
[...]
+/* REG is ID_XXX */
+#define FIELD_DP64_IDREG(ISAR, REG, FIELD, VALUE) \
+ ({ \
+ ARMISARegisters *i_ = (ISAR); \
+ uint64_t regval = i_->idregs[REG ## _EL1_IDX]; \
This won't work for regs that don't fit this naming scheme. Up to this point in the series that's only CTR_EL0, later with the auto generation it will be more. But I guess this can be extended when/if there's an actual need.. Sebastian
