RE: [RFC PATCH v2 05/20] hw/arm/smmuv3-accel: Associate a pxb-pcie bus

Mon, 24 Mar 2025 01:21:49 -0700 


> -----Original Message-----
> From: Nicolin Chen <[email protected]>
> Sent: Thursday, March 20, 2025 5:03 PM
> To: Shameerali Kolothum Thodi <[email protected]>
> Cc: Donald Dutile <[email protected]>; [email protected]; qemu-
> [email protected]; [email protected]; [email protected];
> [email protected]; [email protected]; [email protected];
> [email protected]; [email protected]; Linuxarm
> <[email protected]>; Wangzhou (B) <[email protected]>;
> jiangkunkun <[email protected]>; Jonathan Cameron
> <[email protected]>; [email protected]
> Subject: Re: [RFC PATCH v2 05/20] hw/arm/smmuv3-accel: Associate a pxb-
> pcie bus
> 
> On Wed, Mar 19, 2025 at 09:26:29AM +0000, Shameerali Kolothum Thodi
> wrote:
> > Having said that,  current code only allows pxb-pcie root complexes
> avoiding
> > the pcie.0. The idea behind this was, user can use pcie.0 with a non accel
> SMMUv3
> > for any emulated devices avoiding the performance bottlenecks we are
> > discussing for emulated dev+smmuv3-accel cases. But based on the
> feedback from
> > Eric and Daniel I will relax that restriction and will allow association 
> > with
> pcie.0.
> 
> Just want a clarification here..
> 
> If VM has a passthrough device only:
>  attach it to PCIE.0 <=> vSMMU0 (accel=on)

Yes. Basically support accel=on to pcie.0 as well.

> If VM has an emulated device and a passthrough device:
>  attach the emulated device to PCIE.0 <=> vSMMU bypass (or accel=off?)
>  attach the passthrough device to pxb-pcie <=> vSMMU0 (accel=on)

This can be other way around as well:
ie, 
pass-through to pcie.0(accel=on) and emulated to any other pxb-pcie with accel 
= off.

I think the way bus numbers are allocated in Qemu for pcie.0 and pxb-pcie allows
us to support this in IORT ID maps.

Thanks,
Shameer























					Reply via email to