From: Nicholas Piggin <[email protected]> DSRR0/1 registers are in the BookE ISA not e200 specific, so remove the duplicate e200 register definitions.
Cc: Roman Kapl <[email protected]> Cc: [email protected] Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2768 Fixes: 0e3bf4890906 ("ppc: add DBCR based debugging") Signed-off-by: Nicholas Piggin <[email protected]> (cherry picked from commit 73c0c904fc99e2ceecbbded84ec76d40d3f2daae) (Mjt: context fix for v9.0.0-935-g581eea5d656b "target/ppc: Split off common embedded TLB init") Signed-off-by: Michael Tokarev <[email protected]> diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 294a18a5b7..3f22e0b02e 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -2712,14 +2712,6 @@ static void init_proc_e200(CPUPPCState *env) SPR_NOACCESS, SPR_NOACCESS, &spr_read_generic, &spr_write_generic, 0x00000000); /* TOFIX */ - spr_register(env, SPR_BOOKE_DSRR0, "DSRR0", - SPR_NOACCESS, SPR_NOACCESS, - &spr_read_generic, &spr_write_generic, - 0x00000000); - spr_register(env, SPR_BOOKE_DSRR1, "DSRR1", - SPR_NOACCESS, SPR_NOACCESS, - &spr_read_generic, &spr_write_generic, - 0x00000000); #if !defined(CONFIG_USER_ONLY) env->nb_tlb = 64; env->nb_ways = 1; -- 2.39.5
