Am 09.05.2012 12:27, schrieb Alexander Graf: > On 05/09/2012 02:28 AM, Andreas Färber wrote: >> Adjust the tcg_out_qemu_{ld,st}() slow paths to pass AREG0 in r3, >> based on patches by malc. >> >> Also adjust the registers clobbered, based on patch by Alex. >> >> Signed-off-by: Andreas Färber<afaer...@suse.de> >> --- >> tcg/ppc/tcg-target.c | 37 ++++++++++++++++++++++++++++++++++++- >> 1 files changed, 36 insertions(+), 1 deletions(-) >> >> diff --git a/tcg/ppc/tcg-target.c b/tcg/ppc/tcg-target.c >> index 20888e2..ca84aba 100644 >> --- a/tcg/ppc/tcg-target.c >> +++ b/tcg/ppc/tcg-target.c >> @@ -244,9 +244,19 @@ static int >> target_parse_constraint(TCGArgConstraint *ct, const char **pct_str) >> tcg_regset_set32(ct->u.regs, 0, 0xffffffff); >> tcg_regset_reset_reg(ct->u.regs, TCG_REG_R3); >> tcg_regset_reset_reg(ct->u.regs, TCG_REG_R4); >> +#ifdef CONFIG_TCG_PASS_AREG0 >> + tcg_regset_reset_reg(ct->u.regs, TCG_REG_R5); >> +#if TARGET_LONG_BITS == 64 >> + tcg_regset_reset_reg(ct->u.regs, TCG_REG_R6); >> +#ifdef TCG_TARGET_CALL_ALIGN_ARGS >> + tcg_regset_reset_reg(ct->u.regs, TCG_REG_R7); >> +#endif >> +#endif >> +#else /* !AREG0 */ >> #if TARGET_LONG_BITS == 64 >> tcg_regset_reset_reg(ct->u.regs, TCG_REG_R5); >> #endif >> +#endif >> break; >> case 'K': /* qemu_st[8..32] constraint */ >> ct->ct |= TCG_CT_REG; >> @@ -254,9 +264,19 @@ static int >> target_parse_constraint(TCGArgConstraint *ct, const char **pct_str) >> tcg_regset_reset_reg(ct->u.regs, TCG_REG_R3); >> tcg_regset_reset_reg(ct->u.regs, TCG_REG_R4); >> tcg_regset_reset_reg(ct->u.regs, TCG_REG_R5); >> +#ifdef CONFIG_TCG_PASS_AREG0 >> + tcg_regset_reset_reg(ct->u.regs, TCG_REG_R6); >> +#if TARGET_LONG_BITS == 64 >> + tcg_regset_reset_reg(ct->u.regs, TCG_REG_R7); >> +#ifdef TCG_TARGET_CALL_ALIGN_ARGS >> + tcg_regset_reset_reg(ct->u.regs, TCG_REG_R8); >> +#endif >> +#endif >> +#else /* !AREG0 */ >> #if TARGET_LONG_BITS == 64 >> tcg_regset_reset_reg(ct->u.regs, TCG_REG_R6); >> #endif >> +#endif >> break; >> case 'M': /* qemu_st64 constraint */ >> ct->ct |= TCG_CT_REG; >> @@ -266,6 +286,12 @@ static int >> target_parse_constraint(TCGArgConstraint *ct, const char **pct_str) >> tcg_regset_reset_reg(ct->u.regs, TCG_REG_R5); >> tcg_regset_reset_reg(ct->u.regs, TCG_REG_R6); >> tcg_regset_reset_reg(ct->u.regs, TCG_REG_R7); >> +#if defined(CONFIG_TCG_PASS_AREG0) >> + tcg_regset_reset_reg(ct->u.regs, TCG_REG_R8); >> +#ifdef TCG_TARGET_CALL_ALIGN_ARGS >> + tcg_regset_reset_reg(ct->u.regs, TCG_REG_R9); >> +#endif >> +#endif >> break; >> #else >> case 'L': >> @@ -512,7 +538,6 @@ static void tcg_out_call (TCGContext *s, >> tcg_target_long arg, int const_arg) >> #include "../../softmmu_defs.h" >> >> #ifdef CONFIG_TCG_PASS_AREG0 >> -#error CONFIG_TCG_PASS_AREG0 is not supported >> /* helper signature: helper_ld_mmu(CPUState *env, target_ulong addr, >> int mmu_idx) */ >> static const void * const qemu_ld_helpers[4] = { >> @@ -617,7 +642,12 @@ static void tcg_out_qemu_ld (TCGContext *s, const >> TCGArg *args, int opc) >> #endif >> >> /* slow path */ >> +#ifdef CONFIG_TCG_PASS_AREG0 >> + tcg_out_mov (s, TCG_TYPE_I32, 3, TCG_AREG0); >> + ir = 4; >> +#else >> ir = 3; >> +#endif > > I liked your "start ir with 3 and only ir++ from then on" way of doing > this better. > > ir = 3; > #ifdef ... > tcg_out_mov(,,, ir++); > #endif
This didn't change from v1, but I can update. Andreas > >> #if TARGET_LONG_BITS == 32 >> tcg_out_mov (s, TCG_TYPE_I32, ir++, addr_reg); >> #else >> @@ -816,7 +846,12 @@ static void tcg_out_qemu_st (TCGContext *s, const >> TCGArg *args, int opc) >> #endif >> >> /* slow path */ >> +#ifdef CONFIG_TCG_PASS_AREG0 >> + tcg_out_mov (s, TCG_TYPE_I32, 3, TCG_AREG0); >> + ir = 4; >> +#else >> ir = 3; >> +#endif > > Same here > > > Alex -- SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg