[PATCH 11/11] hw/arm/stm32: Define machines as generic QOM types

[Philippe Mathieu-Daudé]

While DEFINE_MACHINE() is a succinct macro, it doesn't
allow registering QOM interfaces to the defined machine.
Convert to the generic DEFINE_TYPES() in preparation to
register interfaces.

Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
---
 hw/arm/netduino2.c         | 13 +++++++++++--
 hw/arm/netduinoplus2.c     | 13 +++++++++++--
 hw/arm/olimex-stm32-h405.c | 13 +++++++++++--
 hw/arm/stm32vldiscovery.c  | 13 +++++++++++--
 4 files changed, 44 insertions(+), 8 deletions(-)

diff --git a/hw/arm/netduino2.c b/hw/arm/netduino2.c
index df793c77fe1..52c30055d44 100644
--- a/hw/arm/netduino2.c
+++ b/hw/arm/netduino2.c
@@ -52,12 +52,13 @@ static void netduino2_init(MachineState *machine)
                        0, FLASH_SIZE);
 }
 
-static void netduino2_machine_init(MachineClass *mc)
+static void netduino2_machine_class_init(ObjectClass *oc, void *data)
 {
     static const char * const valid_cpu_types[] = {
         ARM_CPU_TYPE_NAME("cortex-m3"),
         NULL
     };
+    MachineClass *mc = MACHINE_CLASS(oc);
 
     mc->desc = "Netduino 2 Machine (Cortex-M3)";
     mc->init = netduino2_init;
@@ -65,4 +66,12 @@ static void netduino2_machine_init(MachineClass *mc)
     mc->ignore_memory_transaction_failures = true;
 }
 
-DEFINE_MACHINE("netduino2", netduino2_machine_init)
+static const TypeInfo netduino_machine_types[] = {
+    {
+        .name           = MACHINE_TYPE_NAME("netduino2"),
+        .parent         = TYPE_MACHINE,
+        .class_init     = netduino2_machine_class_init,
+    },
+};
+
+DEFINE_TYPES(netduino_machine_types)
diff --git a/hw/arm/netduinoplus2.c b/hw/arm/netduinoplus2.c
index 81b6334cf72..2735d3a0e2b 100644
--- a/hw/arm/netduinoplus2.c
+++ b/hw/arm/netduinoplus2.c
@@ -53,16 +53,25 @@ static void netduinoplus2_init(MachineState *machine)
                        0, FLASH_SIZE);
 }
 
-static void netduinoplus2_machine_init(MachineClass *mc)
+static void netduinoplus2_machine_class_init(ObjectClass *oc, void *data)
 {
     static const char * const valid_cpu_types[] = {
         ARM_CPU_TYPE_NAME("cortex-m4"),
         NULL
     };
+    MachineClass *mc = MACHINE_CLASS(oc);
 
     mc->desc = "Netduino Plus 2 Machine (Cortex-M4)";
     mc->init = netduinoplus2_init;
     mc->valid_cpu_types = valid_cpu_types;
 }
 
-DEFINE_MACHINE("netduinoplus2", netduinoplus2_machine_init)
+static const TypeInfo netduino_machine_types[] = {
+    {
+        .name           = MACHINE_TYPE_NAME("netduinoplus2"),
+        .parent         = TYPE_MACHINE,
+        .class_init     = netduinoplus2_machine_class_init,
+    },
+};
+
+DEFINE_TYPES(netduino_machine_types)
diff --git a/hw/arm/olimex-stm32-h405.c b/hw/arm/olimex-stm32-h405.c
index 1f15620f9fd..795218c93cf 100644
--- a/hw/arm/olimex-stm32-h405.c
+++ b/hw/arm/olimex-stm32-h405.c
@@ -56,12 +56,13 @@ static void olimex_stm32_h405_init(MachineState *machine)
                        0, FLASH_SIZE);
 }
 
-static void olimex_stm32_h405_machine_init(MachineClass *mc)
+static void olimex_stm32_machine_class_init(ObjectClass *oc, void *data)
 {
     static const char * const valid_cpu_types[] = {
         ARM_CPU_TYPE_NAME("cortex-m4"),
         NULL
     };
+    MachineClass *mc = MACHINE_CLASS(oc);
 
     mc->desc = "Olimex STM32-H405 (Cortex-M4)";
     mc->init = olimex_stm32_h405_init;
@@ -71,4 +72,12 @@ static void olimex_stm32_h405_machine_init(MachineClass *mc)
     mc->default_ram_size = 0;
 }
 
-DEFINE_MACHINE("olimex-stm32-h405", olimex_stm32_h405_machine_init)
+static const TypeInfo olimex_stm32_machine_types[] = {
+    {
+        .name           = MACHINE_TYPE_NAME("olimex-stm32-h405"),
+        .parent         = TYPE_MACHINE,
+        .class_init     = olimex_stm32_machine_class_init,
+    },
+};
+
+DEFINE_TYPES(olimex_stm32_machine_types)
diff --git a/hw/arm/stm32vldiscovery.c b/hw/arm/stm32vldiscovery.c
index e6c1f5b8d7d..3a9728ca719 100644
--- a/hw/arm/stm32vldiscovery.c
+++ b/hw/arm/stm32vldiscovery.c
@@ -56,16 +56,25 @@ static void stm32vldiscovery_init(MachineState *machine)
                        0, FLASH_SIZE);
 }
 
-static void stm32vldiscovery_machine_init(MachineClass *mc)
+static void stm32vldiscovery_machine_class_init(ObjectClass *oc, void *data)
 {
     static const char * const valid_cpu_types[] = {
         ARM_CPU_TYPE_NAME("cortex-m3"),
         NULL
     };
+    MachineClass *mc = MACHINE_CLASS(oc);
 
     mc->desc = "ST STM32VLDISCOVERY (Cortex-M3)";
     mc->init = stm32vldiscovery_init;
     mc->valid_cpu_types = valid_cpu_types;
 }
 
-DEFINE_MACHINE("stm32vldiscovery", stm32vldiscovery_machine_init)
+static const TypeInfo stm32vldiscovery_machine_types[] = {
+    {
+        .name           = MACHINE_TYPE_NAME("stm32vldiscovery"),
+        .parent         = TYPE_MACHINE,
+        .class_init     = stm32vldiscovery_machine_class_init,
+    },
+};
+
+DEFINE_TYPES(stm32vldiscovery_machine_types)
-- 
2.47.1