Refactor the TRNG device creation using the VersalMap structure. Signed-off-by: Luc Michel <luc.mic...@amd.com> --- include/hw/arm/xlnx-versal.h | 2 -- hw/arm/xlnx-versal.c | 18 ++++++++++-------- 2 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h index 9adce02f8a9..bba96201d37 100644 --- a/include/hw/arm/xlnx-versal.h +++ b/include/hw/arm/xlnx-versal.h @@ -18,11 +18,10 @@ #include "hw/or-irq.h" #include "hw/intc/arm_gicv3.h" #include "hw/rtc/xlnx-zynqmp-rtc.h" #include "qom/object.h" #include "hw/misc/xlnx-versal-crl.h" -#include "hw/misc/xlnx-versal-trng.h" #include "net/can_emu.h" #include "hw/misc/xlnx-versal-cfu.h" #include "hw/misc/xlnx-versal-cframe-reg.h" #include "target/arm/cpu.h" #include "hw/arm/xlnx-versal-version.h" @@ -81,11 +80,10 @@ struct Versal { } lpd; /* The Platform Management Controller subsystem. */ struct { XlnxZynqMPRTC rtc; - XlnxVersalTRng trng; XlnxVersalCFUAPB cfu_apb; XlnxVersalCFUFDRO cfu_fdro; XlnxVersalCFUSFR cfu_sfr; XlnxVersalCFrameReg cframe[XLNX_VERSAL_NR_CFRAME]; XlnxVersalCFrameBcastReg cframe_bcast; diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c index 615eea54372..45d9fc1e282 100644 --- a/hw/arm/xlnx-versal.c +++ b/hw/arm/xlnx-versal.c @@ -35,10 +35,11 @@ #include "hw/usb/xlnx-usb-subsystem.h" #include "hw/nvram/xlnx-versal-efuse.h" #include "hw/ssi/xlnx-versal-ospi.h" #include "hw/misc/xlnx-versal-pmc-iou-slcr.h" #include "hw/nvram/xlnx-bbram.h" +#include "hw/misc/xlnx-versal-trng.h" #define XLNX_VERSAL_ACPU_TYPE ARM_CPU_TYPE_NAME("cortex-a72") #define XLNX_VERSAL_RCPU_TYPE ARM_CPU_TYPE_NAME("cortex-r5f") #define GEM_REVISION 0x40070106 @@ -119,10 +120,11 @@ typedef struct VersalMap { int irq; } ospi; VersalSimplePeriphMap pmc_iou_slcr; VersalSimplePeriphMap bbram; + VersalSimplePeriphMap trng; } VersalMap; static const VersalMap VERSAL_MAP = { .uart[0] = { 0xff000000, 18 }, .uart[1] = { 0xff010000, 19 }, @@ -162,10 +164,11 @@ static const VersalMap VERSAL_MAP = { .irq = 124, }, .pmc_iou_slcr = { 0xf1060000, OR_IRQ(121, 0) }, .bbram = { 0xf11f0000, OR_IRQ(121, 1) }, + .trng = { 0xf1230000, 141 }, }; static const VersalMap *VERSION_TO_MAP[] = { [VERSAL_VER_VERSAL] = &VERSAL_MAP, }; @@ -771,23 +774,22 @@ static void versal_create_rtc(Versal *s, qemu_irq *pic) */ sysbus_connect_irq(sbd, 1, qdev_get_gpio_in(DEVICE(&s->pmc.apb_irq_orgate), 0)); } -static void versal_create_trng(Versal *s, qemu_irq *pic) +static void versal_create_trng(Versal *s, const VersalSimplePeriphMap *map) { SysBusDevice *sbd; MemoryRegion *mr; - object_initialize_child(OBJECT(s), "trng", &s->pmc.trng, - TYPE_XLNX_VERSAL_TRNG); - sbd = SYS_BUS_DEVICE(&s->pmc.trng); - sysbus_realize(sbd, &error_fatal); + sbd = SYS_BUS_DEVICE(qdev_new(TYPE_XLNX_VERSAL_TRNG)); + object_property_add_child(OBJECT(s), "trng", OBJECT(sbd)); + sysbus_realize_and_unref(sbd, &error_abort); mr = sysbus_mmio_get_region(sbd, 0); - memory_region_add_subregion(&s->mr_ps, MM_PMC_TRNG, mr); - sysbus_connect_irq(sbd, 0, pic[VERSAL_TRNG_IRQ]); + memory_region_add_subregion(&s->mr_ps, map->addr, mr); + versal_sysbus_connect_irq(s, sbd, 0, map->irq); } static void versal_create_xrams(Versal *s, const struct VersalXramMap *map) { SysBusDevice *sbd; @@ -1327,14 +1329,14 @@ static void versal_realize(DeviceState *dev, Error **errp) qdev_connect_gpio_out_named(slcr, "ospi-mux-sel", 0, qdev_get_gpio_in_named(ospi, "ospi-mux-sel", 0)); versal_create_bbram(s, &map->bbram); + versal_create_trng(s, &map->trng); versal_create_pmc_apb_irq_orgate(s, pic); versal_create_rtc(s, pic); - versal_create_trng(s, pic); versal_create_crl(s, pic); versal_create_cfu(s, pic); versal_map_ddr(s); versal_unimp(s); -- 2.50.0