On 7/18/25 10:30, Peter Maydell wrote:
FEAT_SVE_B16B16 adds bfloat16 versions of the FMLA and FMLS insns in the "SVE floating-point multiply-accumulate writing addend" group, encoded as sz=0b00.Fixes: 7b1613a1020d2942 ("target/arm: Enable FEAT_SME2p1 on -cpu max") Signed-off-by: Peter Maydell<peter.mayd...@linaro.org> --- target/arm/tcg/helper-sve.h | 14 +++++++ target/arm/tcg/sve_helper.c | 69 ++++++++++++++++++++++++++++++++++ target/arm/tcg/translate-sve.c | 21 ++++++++--- 3 files changed, 98 insertions(+), 6 deletions(-)
Reviewed-by: Richard Henderson <richard.hender...@linaro.org> r~
