Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
---
target/arm/internals.h | 28 ----------------------------
target/arm/mmuidx-internal.h | 17 +++++++++++++++++
target/arm/mmuidx.c | 19 ++++++++++---------
3 files changed, 27 insertions(+), 37 deletions(-)
diff --git a/target/arm/internals.h b/target/arm/internals.h
index 3b730a5d81..0322646753 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -1029,34 +1029,6 @@ static inline void arm_call_el_change_hook(ARMCPU *cpu)
}
}
-/*
- * Return true if this address translation regime has two ranges.
- * Note that this will not return the correct answer for AArch32
- * Secure PL1&0 (i.e. mmu indexes E3, E30_0, E30_3_PAN), but it is
- * never called from a context where EL3 can be AArch32. (The
- * correct return value for ARMMMUIdx_E3 would be different for
- * that case, so we can't just make the function return the
- * correct value anyway; we would need an extra "bool e3_is_aarch32"
- * argument which all the current callsites would pass as 'false'.)
- */
-static inline bool regime_has_2_ranges(ARMMMUIdx mmu_idx)
-{
- switch (mmu_idx) {
- case ARMMMUIdx_Stage1_E0:
- case ARMMMUIdx_Stage1_E1:
- case ARMMMUIdx_Stage1_E1_PAN:
- case ARMMMUIdx_E10_0:
- case ARMMMUIdx_E10_1:
- case ARMMMUIdx_E10_1_PAN:
- case ARMMMUIdx_E20_0:
- case ARMMMUIdx_E20_2:
- case ARMMMUIdx_E20_2_PAN:
- return true;
- default:
- return false;
- }
-}
-
static inline bool regime_is_pan(CPUARMState *env, ARMMMUIdx mmu_idx)
{
switch (mmu_idx) {
diff --git a/target/arm/mmuidx-internal.h b/target/arm/mmuidx-internal.h
index 1a4770401b..76d50a0645 100644
--- a/target/arm/mmuidx-internal.h
+++ b/target/arm/mmuidx-internal.h
@@ -15,6 +15,7 @@ FIELD(MMUIDXINFO, EL, 0, 2)
FIELD(MMUIDXINFO, ELVALID, 2, 1)
FIELD(MMUIDXINFO, REL, 3, 2)
FIELD(MMUIDXINFO, RELVALID, 5, 1)
+FIELD(MMUIDXINFO, 2RANGES, 6, 1)
extern const uint32_t arm_mmuidx_table[ARM_MMU_IDX_M + 8];
@@ -37,4 +38,20 @@ static inline uint32_t regime_el(ARMMMUIdx idx)
return FIELD_EX32(arm_mmuidx_table[idx], MMUIDXINFO, REL);
}
+/*
+ * Return true if this address translation regime has two ranges.
+ * Note that this will not return the correct answer for AArch32
+ * Secure PL1&0 (i.e. mmu indexes E3, E30_0, E30_3_PAN), but it is
+ * never called from a context where EL3 can be AArch32. (The
+ * correct return value for ARMMMUIdx_E3 would be different for
+ * that case, so we can't just make the function return the
+ * correct value anyway; we would need an extra "bool e3_is_aarch32"
+ * argument which all the current callsites would pass as 'false'.)
+ */
+static inline bool regime_has_2_ranges(ARMMMUIdx idx)
+{
+ tcg_debug_assert((unsigned)idx < ARRAY_SIZE(arm_mmuidx_table));
+ return FIELD_EX32(arm_mmuidx_table[idx], MMUIDXINFO, 2RANGES);
+}
+
#endif /* TARGET_ARM_MMUIDX_INTERNAL_H */
diff --git a/target/arm/mmuidx.c b/target/arm/mmuidx.c
index 6dfefa56c2..f880d21606 100644
--- a/target/arm/mmuidx.c
+++ b/target/arm/mmuidx.c
@@ -9,18 +9,19 @@
#define EL(X) ((X << R_MMUIDXINFO_EL_SHIFT) | R_MMUIDXINFO_ELVALID_MASK)
#define REL(X) ((X << R_MMUIDXINFO_REL_SHIFT) | R_MMUIDXINFO_RELVALID_MASK)
+#define R2 R_MMUIDXINFO_2RANGES_MASK
const uint32_t arm_mmuidx_table[ARM_MMU_IDX_M + 8] = {
/*
* A-profile.
*/
- [ARMMMUIdx_E10_0] = EL(0) | REL(1),
- [ARMMMUIdx_E10_1] = EL(1) | REL(1),
- [ARMMMUIdx_E10_1_PAN] = EL(1) | REL(1),
+ [ARMMMUIdx_E10_0] = EL(0) | REL(1) | R2,
+ [ARMMMUIdx_E10_1] = EL(1) | REL(1) | R2,
+ [ARMMMUIdx_E10_1_PAN] = EL(1) | REL(1) | R2,
- [ARMMMUIdx_E20_0] = EL(0) | REL(2),
- [ARMMMUIdx_E20_2] = EL(2) | REL(2),
- [ARMMMUIdx_E20_2_PAN] = EL(2) | REL(2),
+ [ARMMMUIdx_E20_0] = EL(0) | REL(2) | R2,
+ [ARMMMUIdx_E20_2] = EL(2) | REL(2) | R2,
+ [ARMMMUIdx_E20_2_PAN] = EL(2) | REL(2) | R2,
[ARMMMUIdx_E2] = EL(2) | REL(2),
@@ -31,9 +32,9 @@ const uint32_t arm_mmuidx_table[ARM_MMU_IDX_M + 8] = {
[ARMMMUIdx_Stage2_S] = REL(2),
[ARMMMUIdx_Stage2] = REL(2),
- [ARMMMUIdx_Stage1_E0] = REL(1),
- [ARMMMUIdx_Stage1_E1] = REL(1),
- [ARMMMUIdx_Stage1_E1_PAN] = REL(1),
+ [ARMMMUIdx_Stage1_E0] = REL(1) | R2,
+ [ARMMMUIdx_Stage1_E1] = REL(1) | R2,
+ [ARMMMUIdx_Stage1_E1_PAN] = REL(1) | R2,
/*
* M-profile.
--
2.43.0
