Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
---
target/arm/internals.h | 35 ----------------------------
target/arm/mmuidx-internal.h | 13 +++++++++++
target/arm/mmuidx.c | 44 +++++++++++++++++++++---------------
3 files changed, 39 insertions(+), 53 deletions(-)
diff --git a/target/arm/internals.h b/target/arm/internals.h
index 4991d6ab7f..3b730a5d81 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -1075,41 +1075,6 @@ static inline bool regime_is_stage2(ARMMMUIdx mmu_idx)
return mmu_idx == ARMMMUIdx_Stage2 || mmu_idx == ARMMMUIdx_Stage2_S;
}
-/* Return the exception level which controls this address translation regime */
-static inline uint32_t regime_el(ARMMMUIdx mmu_idx)
-{
- switch (mmu_idx) {
- case ARMMMUIdx_E20_0:
- case ARMMMUIdx_E20_2:
- case ARMMMUIdx_E20_2_PAN:
- case ARMMMUIdx_Stage2:
- case ARMMMUIdx_Stage2_S:
- case ARMMMUIdx_E2:
- return 2;
- case ARMMMUIdx_E3:
- case ARMMMUIdx_E30_0:
- case ARMMMUIdx_E30_3_PAN:
- return 3;
- case ARMMMUIdx_E10_0:
- case ARMMMUIdx_Stage1_E0:
- case ARMMMUIdx_Stage1_E1:
- case ARMMMUIdx_Stage1_E1_PAN:
- case ARMMMUIdx_E10_1:
- case ARMMMUIdx_E10_1_PAN:
- case ARMMMUIdx_MPrivNegPri:
- case ARMMMUIdx_MUserNegPri:
- case ARMMMUIdx_MPriv:
- case ARMMMUIdx_MUser:
- case ARMMMUIdx_MSPrivNegPri:
- case ARMMMUIdx_MSUserNegPri:
- case ARMMMUIdx_MSPriv:
- case ARMMMUIdx_MSUser:
- return 1;
- default:
- g_assert_not_reached();
- }
-}
-
static inline bool regime_is_user(CPUARMState *env, ARMMMUIdx mmu_idx)
{
switch (mmu_idx) {
diff --git a/target/arm/mmuidx-internal.h b/target/arm/mmuidx-internal.h
index 35d41495cd..1a4770401b 100644
--- a/target/arm/mmuidx-internal.h
+++ b/target/arm/mmuidx-internal.h
@@ -13,6 +13,8 @@
FIELD(MMUIDXINFO, EL, 0, 2)
FIELD(MMUIDXINFO, ELVALID, 2, 1)
+FIELD(MMUIDXINFO, REL, 3, 2)
+FIELD(MMUIDXINFO, RELVALID, 5, 1)
extern const uint32_t arm_mmuidx_table[ARM_MMU_IDX_M + 8];
@@ -24,4 +26,15 @@ static inline int arm_mmu_idx_to_el(ARMMMUIdx idx)
return FIELD_EX32(arm_mmuidx_table[idx], MMUIDXINFO, EL);
}
+/*
+ * Return the exception level for the address translation regime
+ * associated with this mmu index.
+ */
+static inline uint32_t regime_el(ARMMMUIdx idx)
+{
+ tcg_debug_assert((unsigned)idx < ARRAY_SIZE(arm_mmuidx_table));
+ tcg_debug_assert(FIELD_EX32(arm_mmuidx_table[idx], MMUIDXINFO, RELVALID));
+ return FIELD_EX32(arm_mmuidx_table[idx], MMUIDXINFO, REL);
+}
+
#endif /* TARGET_ARM_MMUIDX_INTERNAL_H */
diff --git a/target/arm/mmuidx.c b/target/arm/mmuidx.c
index 309b1d68df..6dfefa56c2 100644
--- a/target/arm/mmuidx.c
+++ b/target/arm/mmuidx.c
@@ -8,34 +8,42 @@
#define EL(X) ((X << R_MMUIDXINFO_EL_SHIFT) | R_MMUIDXINFO_ELVALID_MASK)
+#define REL(X) ((X << R_MMUIDXINFO_REL_SHIFT) | R_MMUIDXINFO_RELVALID_MASK)
const uint32_t arm_mmuidx_table[ARM_MMU_IDX_M + 8] = {
/*
* A-profile.
*/
- [ARMMMUIdx_E10_0] = EL(0),
- [ARMMMUIdx_E10_1] = EL(1),
- [ARMMMUIdx_E10_1_PAN] = EL(1),
+ [ARMMMUIdx_E10_0] = EL(0) | REL(1),
+ [ARMMMUIdx_E10_1] = EL(1) | REL(1),
+ [ARMMMUIdx_E10_1_PAN] = EL(1) | REL(1),
- [ARMMMUIdx_E20_0] = EL(0),
- [ARMMMUIdx_E20_2] = EL(2),
- [ARMMMUIdx_E20_2_PAN] = EL(2),
+ [ARMMMUIdx_E20_0] = EL(0) | REL(2),
+ [ARMMMUIdx_E20_2] = EL(2) | REL(2),
+ [ARMMMUIdx_E20_2_PAN] = EL(2) | REL(2),
- [ARMMMUIdx_E2] = EL(2),
+ [ARMMMUIdx_E2] = EL(2) | REL(2),
- [ARMMMUIdx_E3] = EL(3),
- [ARMMMUIdx_E30_0] = EL(0),
- [ARMMMUIdx_E30_3_PAN] = EL(3),
+ [ARMMMUIdx_E3] = EL(3) | REL(3),
+ [ARMMMUIdx_E30_0] = EL(0) | REL(3),
+ [ARMMMUIdx_E30_3_PAN] = EL(3) | REL(3),
+
+ [ARMMMUIdx_Stage2_S] = REL(2),
+ [ARMMMUIdx_Stage2] = REL(2),
+
+ [ARMMMUIdx_Stage1_E0] = REL(1),
+ [ARMMMUIdx_Stage1_E1] = REL(1),
+ [ARMMMUIdx_Stage1_E1_PAN] = REL(1),
/*
* M-profile.
*/
- [ARMMMUIdx_MUser] = EL(0),
- [ARMMMUIdx_MPriv] = EL(1),
- [ARMMMUIdx_MUserNegPri] = EL(0),
- [ARMMMUIdx_MPrivNegPri] = EL(1),
- [ARMMMUIdx_MSUser] = EL(0),
- [ARMMMUIdx_MSPriv] = EL(1),
- [ARMMMUIdx_MSUserNegPri] = EL(0),
- [ARMMMUIdx_MSPrivNegPri] = EL(1),
+ [ARMMMUIdx_MUser] = EL(0) | REL(1),
+ [ARMMMUIdx_MPriv] = EL(1) | REL(1),
+ [ARMMMUIdx_MUserNegPri] = EL(0) | REL(1),
+ [ARMMMUIdx_MPrivNegPri] = EL(1) | REL(1),
+ [ARMMMUIdx_MSUser] = EL(0) | REL(1),
+ [ARMMMUIdx_MSPriv] = EL(1) | REL(1),
+ [ARMMMUIdx_MSUserNegPri] = EL(0) | REL(1),
+ [ARMMMUIdx_MSPrivNegPri] = EL(1) | REL(1),
};
--
2.43.0
